Coherent Decoding Circuit With Mixed SDD-HDD Noise Allocation
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Solution Overview
Problem
Existing communication systems face a trade-off between high decoding accuracy and reduced power consumption, particularly in backbone optical transmission systems using soft-decision decoding (SDD), where switching to hard-decision decoding (HDD) for power reduction leads to performance deterioration.
Innovation Solution
Implement a serial-parallel conversion circuit to divide data into multiple streams, apply different error correction codes to each stream, and use a bit conversion circuit to make noise non-uniform across streams, coupled with a likelihood calculation circuit and multiple decoders to optimize decoding accuracy and reduce calculation load.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If soft-decision decoding (SDD) is used for decoding, then decoding accuracy is improved, but calculation amount and power consumption increase
Solution Approach 1:
The invention divides the data stream into multiple parallel streams using serial-parallel conversion, applies different decoding methods to different streams based on their noise characteristics, and then combines the results. This segmentation allows the system to use computationally intensive SDD only for streams that benefit most from it, while using simpler HDD for other streams, thereby reducing overall power consumption while maintaining high decoding accuracy.
Solution Approach 2:
The invention applies different decoding qualities (SDD or HDD) to different data streams based on their individual noise levels and importance. High-priority streams with higher noise are decoded using SDD for maximum accuracy, while lower-priority streams are decoded using HDD to save computational resources. This local differentiation optimizes the balance between power consumption and decoding accuracy.
2Use of energy by moving object
If hard-decision decoding (HDD) is used for decoding, then power consumption is reduced, but decoding accuracy deteriorates
Solution Approach 1:
The invention segments the data into multiple streams and applies HDD to some streams while applying SDD to others. This allows the system to reduce power consumption by using HDD for streams where it is sufficient, while maintaining decoding accuracy by applying SDD to critical streams that require higher precision.
Solution Approach 2:
The invention applies different decoding qualities locally to different data streams based on their specific requirements. Streams with lower noise or lower priority are decoded using HDD to save power, while streams requiring higher accuracy are decoded using SDD. This local quality differentiation resolves the contradiction by ensuring HDD is used only where it does not compromise overall system performance.
3Productivity
If multiple encoders and decoders are used in parallel, then frequency utilization efficiency is improved, but device complexity increases
Solution Approach 1:
The invention divides the data stream into multiple parallel streams that can be processed simultaneously by multiple encoders and decoders. This segmentation enables frequency division multiplexing and improves frequency utilization efficiency by keeping all processing units actively engaged rather than having them operate sequentially or idle.
Solution Approach 2:
The invention creates a modular architecture where encoders and decoders can be configured to handle different data streams with different requirements. The same hardware blocks can be reused across multiple streams, and the system can adaptively assign decoding methods (SDD or HDD) to different streams, providing multi-functionality without proportionally increasing device complexity.
Data Source
AI summary
There is provided an encoding circuit used for coherent digital signal processing, including: a serial-parallel circuit that divides input data into a plurality of pieces of divided data by serial-parallel conversion; a plurality of encoders that adds an error correction code to the divided data and encodes the divided data; and a bit conversion circuit that converts a bit sequence in order to make an amount of noise generated by a communication channel non-uniform among the plurality of pieces of divided data encoded by each of the plurality of encoders.