Coherent Interface Queue Access Indication

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Solution Overview

Problem

Existing queue management systems in communication protocols, such as NVMe, rely on resource-intensive mechanisms like doorbell registers and interrupts to indicate queue access, which can consume host and device resources.

Innovation Solution

Implementing a coherent interface with coherency mechanisms, such as cache and memory coherency protocols, to provide indications of queue access, reducing the need for doorbell registers and interrupts by leveraging cache and memory coherency to notify hosts and devices of changes to queue entries.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If doorbell registers and interrupts are used to indicate queue access, then queue management reliability is improved, but resource consumption increases

Engineering Contradiction:

Improvequeue access indication reliabilityVSAvoidhost and device resource consumption

Core Design Contradiction:

ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent combines the queue storage and access indication functions into a single coherent memory structure. The queue entries themselves serve as both the data storage medium and the indication trigger, eliminating the need for separate doorbell registers and interrupt mechanisms. When the host writes to the queue, the coherent interface automatically detects the memory access and notifies the device, merging multiple functions into one unified approach.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The coherent interface acts as an intermediary between the host and device, monitoring memory accesses to the queue and automatically generating notifications. This intermediary mechanism replaces the traditional doorbell register approach by intercepting and translating memory write operations into appropriate device notifications, reducing the need for separate indication hardware.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Measurement precision

If doorbell registers are used for queue access indication, then access notification accuracy is improved, but device complexity increases

Engineering Contradiction:

Improveaccess notification accuracyVSAvoidqueue management structure complexity

Core Design Contradiction:

Measurement precisionVSDevice complexity

Solution Approach 1:

The patent extracts the access indication function from separate doorbell registers and integrates it directly into the queue memory structure. By removing the need for parallel doorbell register structures, the system maintains accurate access notification while significantly simplifying the overall device architecture and reducing the number of separate components required.

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The queue memory structure is designed to serve multiple functions simultaneously: it stores command entries, tracks access status, and generates notifications. This multi-functional design eliminates the need for specialized doorbell registers dedicated solely to access indication, reducing structural complexity while maintaining notification accuracy through the universal queue structure.

Inventive Principle:

Principle #6Universality (Multi-functionality)

3Reliability

If traditional interrupt mechanisms are used, then queue access detection reliability is improved, but overhead increases

Engineering Contradiction:

Improvequeue access detection reliabilityVSAvoidindication overhead time

Core Design Contradiction:

ReliabilityVSLoss of time

Solution Approach 1:

The coherent interface is pre-configured with monitoring capabilities for queue memory locations before operations begin. This preliminary setup allows the system to passively detect and respond to queue accesses as they occur, eliminating the need for active polling or complex interrupt setup procedures, thereby reducing overhead while maintaining reliable detection.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The coherent interface automatically monitors and detects queue access operations without requiring external intervention or additional processing overhead. The memory coherence mechanism itself performs the detection and notification functions, making the system self-sufficient and eliminating the need for separate interrupt handling procedures, thus reducing time overhead while maintaining reliability.

Inventive Principle:

Principle #25Self-service

Data Source

PatentUS12117944B2Systems, methods, and devices for queue management with a coherent interface

Publication Date: 2024.10.15 SAMSUNG ELECTRONICS CO LTD

AI summary

A method may include accessing, by a first apparatus, a queue, wherein the queue may be accessible by a second apparatus, and the first apparatus may be connected to the second apparatus by a coherent interface, and indicating, by the coherent interface, to the second apparatus, the accessing. The indicating may include indicating by a monitoring mechanism. The indicating may include generating a monitoring request. The indicating may include generating, based on the monitoring request, an alert. The queue may include a submission queue. The queue may include a completion queue. The accessing may include reading an entry from the queue. The accessing may include writing an entry to the queue. The entry may include a command. The entry may include a completion. The first apparatus may include a host, and the second apparatus may include a device. The queue may be located at the host.