Coherent Memory Circuitry for Autonomous Task Scheduling
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Solution Overview
Problem
Existing data processing systems face inefficiencies in task scheduling and context switching due to reliance on operating systems, which can lead to increased latency and resource management complexities.
Innovation Solution
The implementation of coherent memory circuitry and scheduling circuitry within interconnected processing elements allows for autonomous task scheduling and context data management, enabling consistent data access and attribute modification across processing elements, reducing the need for operating system intervention.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If operating systems are used for task scheduling and context switching, then system control and management are centralized, but scheduling latency increases and resource management complexity increases
Solution Approach 1:
The patent extracts the scheduling and context management functions from the operating system layer and implements them directly in hardware within each processing element. This removes the software overhead that causes latency while distributing the management complexity across individual processing elements rather than centralizing it in the OS
Solution Approach 2:
Each processing element is equipped with autonomous scheduling circuitry and coherent memory circuitry that enables it to independently manage its own task attributes and context data without requiring external OS intervention. This self-service capability reduces both scheduling latency and the complexity of centralized resource management
2Productivity
If context data is saved and loaded between processing elements, then task execution can be distributed, but data consistency challenges arise
Solution Approach 1:
The patent merges the scheduling functionality and memory coherence functionality into a unified coherent memory circuitry structure that is directly integrated with each processing element. This integration ensures that when context data and task attributes are transferred between processing elements, consistency is automatically maintained through the coherent memory protocol, enabling reliable distributed task execution
3Productivity
If processing elements autonomously manage task attributes, then scheduling efficiency improves, but local resource management complexity increases
Solution Approach 1:
The coherent memory circuitry integrated in each processing element serves multiple functions: it stores task attributes, maintains context data, ensures data consistency across elements, and provides scheduling information. This multi-functionality consolidates what would otherwise be separate complex subsystems into a single unified structure, improving scheduling efficiency without proportionally increasing overall system complexity
Data Source
AI summary
Data processing apparatus comprises one or more interconnected processing elements each configured to execute processing instructions of a program task; coherent memory circuitry storing one or more copies of data accessible by each of the processing elements, so that data written to a memory address in the coherent memory circuitry by one processing element is consistent with data read from that memory address in the coherent memory circuitry by another of the processing elements; the coherent memory circuitry comprising a memory region to store data, accessible by the processing elements, defining one or more attributes of a program task and context data associated with a most recent instance of execution of that program task; the apparatus comprising scheduling circuitry to schedule execution of a task by a processing element in response to the one or more attributes defined by data stored in the memory region corresponding to that task; and each processing element which executes a program task is configured to modify one or more of the attributes corresponding to that program task in response to execution of that program task.