Coherent Optical DSP Messaging Channel for Pre-FEC Synchronization
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Solution Overview
Problem
Current optical networking technologies lack a specification for an in-band messaging channel within the DSP frame structure, leading to non-deterministic timing delays and uncertainty in timing synchronization between nodes, especially during start-up or fault recovery, due to elastic FIFOs and FEC mappings, which are not addressed by existing protocol-based solutions.
Innovation Solution
A messaging channel is defined within the DSP frame at the Physical Media Attachment (PMA) sublayer, allowing for robust communication before Forward Error Correction (FEC) decoding, using reserved or padding symbols for messaging, and employing techniques like parity checks and FEC to ensure reliability across unprotected bits, enabling functions such as vendor identification and clock recovery.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If protocol-based timing synchronization (IEEE 1588 PTP) is used over optical networks, then timing information can be transferred between nodes, but non-deterministic timing delays and uncertainty occur due to elastic FIFOs and FEC mappings
Solution Approach 1:
The patent applies preliminary action by defining a timing reference point at the DSP frame level (pre-FEC) before data enters elastic FIFO buffers. This early timestamp assignment ensures that timing information is captured at a deterministic point in the signal path, eliminating the non-deterministic delays introduced by subsequent FEC decoding and protocol processing. The timing reference is established using training symbols or dedicated fields in the DSP frame structure before any variable-delay processing occurs.
Solution Approach 2:
The patent introduces an intermediary timing reference mechanism that bridges the physical layer (DSP frame) and the protocol layer (PTP). By placing a timing reference point in the DSP frame structure (using training symbols or reserved fields), it creates a stable intermediate reference that can be used by both coherent detection and higher-layer protocols, ensuring deterministic timing measurement independent of FEC and protocol processing variations.
2Reliability
If existing protocol layer communication channels are used, then communication can occur after a stable bi-directional physical link is established, but it takes milliseconds or seconds to get a stable link, creating a chicken-and-egg issue for DSP settings and unique identifiers
Solution Approach 1:
The patent enables preliminary communication actions by embedding a messaging channel within the DSP frame structure itself, allowing pre-FEC messaging before the protocol layer is fully established. This permits exchange of unique identifiers, vendor information, and DSP configuration parameters during the physical link initialization phase, eliminating the need to wait for protocol-layer link establishment. The messaging channel uses reserved or padding symbols in the DSP frame to carry messages robustly even before FEC decoding is available.
Solution Approach 2:
The patent segments the communication function into two parts: a pre-FEC messaging channel embedded in the DSP frame for initial link setup and identifier exchange, and the post-FEC protocol layer for higher-level communication. This segmentation allows critical initialization messages to be transmitted through the more reliable pre-FEC channel, while protocol-layer communication handles less time-sensitive functions.
3Loss of time
If reserved or padding symbols in DSP frame are used for messaging, then a messaging channel is available prior to FEC decoding, but additional robustness mechanisms like parity checks and FEC are needed to ensure reliability across unprotected bits
Solution Approach 1:
The patent applies partial protection by using simple parity checks or repetition coding on the pre-FEC messaging channel, which provides sufficient robustness for the low-data-rate control messages without the full complexity of FEC decoding. This partial error protection is adequate for messaging purposes and can be implemented with minimal computational overhead, balancing reliability requirements with the need for early message availability before full FEC processing.
Data Source
AI summary
Systems and methods include receiving (102) a plurality of symbols that are part of a defined Digital Signal Processing (DSP) frame for coherent optical communication, wherein the DSP frame structure has a messaging channel incorporated therein that includes a subset of the plurality of symbols; capturing (104) multiple samples of the messaging channel; and determining (106) a message in the messaging channel based on analysis of the multiple samples. The method can further include transmitting (108), in the messaging channel, a reply to the message with the reply being repeated multiple times. The analysis is performed prior to Forward Error Correction (FEC) decoding on the data path.