Compensating Coherent Optics Delay Asymmetry in Packet Optical Networks

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Solution Overview

Problem

Coherent optics in packet optical networks introduce delay asymmetry, leading to time errors due to variable delays in transmit and receive directions, which existing technologies like IEEE 1588-2008 do not adequately address, especially with the introduction of asynchronous mappings and non-deterministic timing in Soft-Decision Forward Error Correction schemes.

Innovation Solution

A software implementation that measures fill levels of elastic FIFO queues in transport mapping schemes within optical modems and DSP devices, adjusts clocks based on these measurements, and signals adjustments to reduce time errors through in-band or out-of-band signaling, ensuring synchronized timing across nodes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If coherent optics are used in packet optical networks, then network capacity and flexibility are improved, but delay asymmetry is introduced causing time errors

Engineering Contradiction:
Improvenetwork capacityVSAvoidtiming accuracy
Core Design Contradiction:
ProductivityVSMeasurement precision

Solution Approach 1:

The patent measures and records the fill levels of elastic FIFO queues before timing synchronization occurs. By capturing the queue state in advance (at the moment timestamps are generated), the system can later compensate for the delay asymmetry introduced by coherent optics without affecting the real-time synchronization performance.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system uses the measured queue fill levels as feedback to calculate and apply delay asymmetry compensation. The compensation value is derived from the difference in fill levels between transmit and receive directions, and this feedback mechanism allows the system to continuously adjust for timing errors caused by coherent optics.

Inventive Principle:
Principle #23Feedback

2Adaptability or versatility

If elastic FIFO queues are used in transport mapping schemes, then adaptability is improved, but delay asymmetry and time errors are introduced

Engineering Contradiction:
Improvetransport mapping flexibilityVSAvoidtiming accuracy
Core Design Contradiction:
Adaptability or versatilityVSMeasurement precision

Solution Approach 1:

The patent captures the fill level of elastic FIFO queues at the precise moment when timestamps are generated, before any variable delays occur. This preliminary measurement allows the system to later compensate for the asymmetry introduced by the elastic queues, maintaining both their adaptability and timing accuracy.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent replaces hardware-based timing compensation mechanisms with a software implementation that uses measured queue fill levels to calculate and apply delay asymmetry compensation. This software approach allows for more flexible and precise compensation while maintaining the adaptability of elastic FIFO queues.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Adaptability or versatility

If IEEE 1588-2008 is used for time synchronization, then protocol compatibility is improved, but time error compensation for coherent optics is insufficient

Engineering Contradiction:
Improveprotocol compatibilityVSAvoidtime error accuracy
Core Design Contradiction:
Adaptability or versatilityVSMeasurement precision

Solution Approach 1:

The patent introduces an intermediary compensation mechanism that works in conjunction with IEEE 1588-2008. The measured queue fill levels serve as an intermediary parameter that allows the system to calculate delay asymmetry and apply compensation, bridging the gap between the standard protocol's limitations and the requirements for high-precision timing in coherent optics networks.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent modifies the timing parameters by incorporating delay asymmetry compensation based on measured queue fill levels. This parameter change allows the system to maintain compatibility with IEEE 1588-2008 while achieving the precision required for coherent optics, effectively extending the protocol's capabilities.

Inventive Principle:
Principle #35Parameter changes

4Measurement precision

If manual timing adjustment is performed, then timing accuracy is improved, but operational complexity and costs increase

Engineering Contradiction:
Improvetiming accuracyVSAvoidoperational complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent implements a self-service mechanism where the system automatically measures queue fill levels, calculates delay asymmetry, and applies compensation without manual intervention. This automation maintains high timing accuracy while eliminating the operational complexity and costs associated with manual timing adjustments.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The system uses automatic feedback loops to continuously monitor queue fill levels and adjust timing compensation accordingly. This automated feedback mechanism replaces manual timing adjustments, maintaining precision while reducing operational complexity through self-adjusting algorithms.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS10594395B2Systems and methods for compensating coherent optics delay asymmetry in a packet optical network
Publication Date: 2020.03.17 CIENA CORP
  • US10594395B2 patent drawing
  • US10594395B2 patent drawing
  • US10594395B2 patent drawing

AI summary

Systems and methods of compensating for the delay asymmetry of coherent optical modems in a packet optical network include measuring fill levels of one or more queues each including an elastic First-In-First-Out (FIFO) circuit used in a transport mapping scheme, wherein the transport mapping scheme is one or more of client mapping to Optical Transport Unit (OTU) and OTU mapping to Flexible OTN (FlexO); and performing adjustments in a clock based in part on the measured fill levels, wherein the adjustments are configured to reduce a Time Error (TE) in the packet network based on delay asymmetry between two nodes.