Coil Component Insulating Layer Geometry for Stacking Alignment
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Solution Overview
Problem
Existing coil components face challenges with stacking misalignment and step-off issues when forming multiple layers, which can lead to deteriorated electrical characteristics such as decreased inductance value and increased electrical resistance, due to positional deviations during the manufacturing process of laminated wiring layers.
Innovation Solution
The solution involves forming a first insulating layer with an inverted trapezoidal shape, where the length of the lower side is shorter than the upper side, and a second insulating layer with a similar shape, preventing misalignment by ensuring the upper layer's wiring is within the range of the lower layer's surface, without necessitating increased insulating wall thickness or reduced conductor count.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the insulating walls are made thicker or the conductor width is reduced to prevent stacking misalignment, then manufacturing precision is improved, but electrical characteristics such as inductance value and electrical resistance deteriorate
Solution Approach 1:
The patent applies asymmetry by forming the insulating layer with a tapered cross-section where the upper surface width is greater than the lower surface width. This asymmetric geometry allows the upper wiring layer to be positioned within the projection area of the lower wiring layer without requiring increased insulating wall thickness or reduced conductor dimensions, thereby maintaining both alignment precision and electrical characteristics
Solution Approach 2:
The patent resolves the alignment issue by transitioning from a two-dimensional planar approach to a three-dimensional tapered structure. By controlling the cross-sectional shape of the insulating layer in the vertical dimension, the patent enables the upper layer to be aligned within the lower layer's projection area without compromising the conductor dimensions or requiring additional insulating thickness
2Productivity
If multiple layers of winding portion are laminated on one main surface, then productivity is improved, but manufacturing precision deteriorates due to stacking misalignment
Solution Approach 1:
The tapered insulating layer structure creates an asymmetric geometry where the upper surface is wider than the lower surface. This allows multiple wiring layers to be laminated with the upper layers positioned within the projection area of lower layers, enabling multi-layer construction while maintaining precise stacking alignment without requiring complex alignment processes
Solution Approach 2:
By utilizing the vertical dimension and forming the insulating layer with a tapered cross-section, the patent enables multi-layer lamination while controlling horizontal alignment. The tapered structure provides a geometric guide that ensures upper layers are positioned within the projection area of lower layers, facilitating high-precision stacking for multi-layer configurations
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively prevents stacking misalignment and step-off while maintaining optimal electrical characteristics, allowing for improved inductance values and resistance without compromising manufacturing yield.
Implementation Method 1
a photosensitive resin is disposed so as to cover the circuit pattern, and the photosensitive resin is exposed and developed by irradiation light from a projection exposure apparatus set to off-focus with respect to a surface of the photosensitive resin
Data Source
AI summary
An electronic component includes a second insulating layer laminated on a main surface of a first insulating layer in which a circuit pattern is embedded, so that stacking misalignment or step-off of a wiring layer is prevented without impairing electrical characteristics. An electronic component includes a first insulating layer having a main surface; a circuit pattern embedded in the first insulating layer and extending along a plane parallel to the main surface; and a second insulating layer laminated on the main surface. A section of the first insulating layer orthogonal to the main surface is an inverted trapezoid in which a length of a lower side opposite to the main surface is shorter than a length of an upper side on the main surface side.