Power Electronics Modules with Cold Spray Interconnects

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Traditional power electronics modules face challenges with wire-bonded interconnects, including noise, vibration, fatigue, and temperature limitations, which hinder their reliability and performance, especially at high temperatures, and thermal spray deposition methods introduce oxide depositions and high processing temperatures.

Innovation Solution

The use of a power electronics module with an insulated patterned metal substrate and semiconductor, where solid metal particles are mechanically bound via plastic deformation to form electrical interconnects and dielectric materials, eliminating voids and oxides, and utilizing cold spray deposition to create a void-free and oxide-free particle-substrate interface for improved reliability and thermal management.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If wire-bonded interconnects are used, then electrical connections are established, but noise, vibration, fatigue, and temperature limitations occur

Engineering Contradiction:
Improveinterconnect reliabilityVSAvoidnoise and vibration
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent replaces the mechanical wire-bonding system with a direct metal-to-metal bonded interconnect structure. The interconnect comprises a metal layer directly bonded to the semiconductor substrate, eliminating the need for separate wire bonds and their associated mechanical vulnerabilities to noise, vibration, and fatigue.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Reliability

If wire-bonded interconnects are used, then electrical connections are established, but operational temperature restrictions are imposed

Engineering Contradiction:
Improvehigh temperature toleranceVSAvoidoperational temperature range
Core Design Contradiction:
ReliabilityVSTemperature

Solution Approach 1:

The patent replaces the wire-bonding mechanical system with a direct metal-to-metal bonded structure that can withstand higher temperatures. The metal layer is directly bonded to the semiconductor substrate through a bonding process that creates a thermally stable interface, enabling operation at elevated temperatures without the limitations of wire-bonded structures.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Ease of manufacture

If thermal spray deposition is used to provide electronic interconnects, then interconnects are formed, but temperatures of up to 20,000° C. are subjected to the packaging

Engineering Contradiction:
Improveinterconnect formation capabilityVSAvoidprocessing temperature
Core Design Contradiction:
Ease of manufactureVSTemperature

Solution Approach 1:

The patent changes the processing parameters from high-temperature thermal spray deposition to low-temperature direct metal bonding. The metal layer is deposited and then directly bonded to the semiconductor substrate at temperatures significantly lower than 20,000° C., thereby achieving interconnect formation without subjecting the packaging to extreme temperatures.

Inventive Principle:
Principle #35Parameter changes

4Ease of manufacture

If thermal spray deposition is used, then interconnects are formed, but oxide depositions occur on bonds between components

Engineering Contradiction:
Improveinterconnect formation capabilityVSAvoidbond quality
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent changes the bonding process parameters to eliminate oxide formation. Instead of thermal spray deposition that creates oxide depositions, the method uses direct metal-to-metal bonding with controlled atmosphere and temperature parameters that prevent oxidation, resulting in oxide-free bonds between components.

Inventive Principle:
Principle #35Parameter changes

5Productivity

If conventional interconnect methods are used, then electrical connections are established, but spatial limitations prevent meeting reduced size demands

Engineering Contradiction:
Improvemodule size reductionVSAvoidspatial requirements
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent merges the interconnect structure with the semiconductor substrate by directly bonding a metal layer to the substrate. This integration eliminates separate wire bonds and reduces the spatial requirements for interconnect routing, enabling module size reduction while maintaining electrical connection functionality.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the reliability and performance of power electronics modules by reducing noise, improving thermal dissipation, and extending operational temperature ranges, while minimizing parasitic capacitance and power consumption, leading to longer module lifespan and increased efficiency.

Implementation Method 1

an agglomeration of solid metal particles mechanically bound to each other and the substrate via plastic deformation

Methodology Applied
Scientific EffectPlastic deformation: Plasticity

Implementation Method 2

utilizing cold spray deposition to create a void-free and oxide-free particle-substrate interface

Methodology Applied
Scientific EffectCold spray deposition: Deposition (physical)

Data Source

PatentUS9532448B1Power electronics modules
Publication Date: 2016.12.27 FORD GLOBAL TECH LLC
  • US9532448B1 patent drawing
  • US9532448B1 patent drawing
  • US9532448B1 patent drawing

AI summary

A power electronics module including an insulated patterned metal substrate, a semiconductor bonded to the substrate, and an agglomeration of solid metal particles mechanically bound to each other and the substrate and arranged to form electrical interconnects between the semiconductor and a bus bar, a control board, a sensor, or a combination thereof.