Collapsed VOQ Switch Core Flow Control
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Solution Overview
Problem
High-speed packet switching systems face congestion issues due to the high round-trip time of flow control information, leading to inefficient use of shared-memory switch cores and potential packet loss, especially in terabit-class switches where reaction time becomes too high to prevent congestion effectively.
Innovation Solution
Implementing a collapsed virtual output queuing (VOQ) system where each ingress port adapter sends a request for each incoming packet, updating a centralized array to track queue filling, and selectively acknowledging queues to control packet forwarding, reducing the need for back-pressure mechanisms and minimizing shared-memory requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional VOQ systems are used in high-speed switches, then flow control can be implemented, but the round-trip time of flow control information becomes too high to prevent congestion effectively
Solution Approach 1:
The patent merges all virtual output queues from multiple ingress port adapters into a single centralized VOQ structure in the switch core. This consolidation allows the switch core to have direct visibility and control over all queue states, eliminating the need for slow round-trip flow control messages to ingress adapters and enabling immediate congestion prevention decisions.
Solution Approach 2:
The patent implements a feedback mechanism where the switch core continuously monitors the centralized VOQ states and dynamically adjusts packet admission and forwarding decisions. The control logic in the switch core receives real-time information about queue filling levels and immediately responds by controlling packet injection from ingress adapters, creating a fast closed-loop control system that prevents congestion before it occurs.
2Adaptability or versatility
If traditional VOQ systems with multiple ingress adapters are used, then packet routing flexibility is maintained, but the amount of shared-memory required increases
Solution Approach 1:
The patent combines the buffering function of all ingress port adapter VOQs into a single shared VOQ structure located in the switch core. This merger eliminates redundant buffer memory across multiple ingress adapters, significantly reducing the total shared-memory requirement while maintaining the ability to route packets from any ingress to any egress port through the centralized control logic.
3Reliability
If back-pressure mechanisms are used to control packet flow, then congestion can be managed, but packet loss increases and continuous flow is disrupted
Solution Approach 1:
The patent implements preliminary action by having the switch core proactively monitor VOQ filling levels and control packet admission before congestion occurs. The centralized control logic predicts potential congestion based on current queue states and adjusts packet injection rates in advance, preventing the need for reactive back-pressure mechanisms that would disrupt continuous packet flow and cause packet loss.
Data Source
AI summary
A system and a method to avoid packet traffic congestion in a shared-memory switch core, while dramatically reducing the amount of shared memory in the switch core and the associated egress buffers, is disclosed. According to the invention, the virtual output queuing (VOQ) of all ingress adapters of a packet switch fabric are collapsed into its central switch core to allow an efficient flow control. The transmission of packets from an ingress buffer to the switch core is subject to a mechanism of request/acknowledgment. Therefore, a packet is transmitted from a virtual output queue to the shared-memory switch core only if the switch core can actually forward it to the corresponding egress buffer. A token based mechanism allows the switch core to determine the egress buffer's level of occupation. Therefore, since the switch core knows the states of the input and output adapters, it is able to optimize packet switching and to avoid packet congestion. Furthermore, since a packet is admitted in the switch core only if it can be transmitted to the corresponding egress buffer, the shared memory is reduced.