Collar Electrode for 3D Memory Stack Interface Control

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Solution Overview

Problem

Current three-dimensional memory devices face challenges in efficiently forming monolithic vertical NAND strings with multilevel memory arrays, as existing methods struggle to create a stable and densely packed structure with effective electrical connectivity and charge storage capabilities.

Innovation Solution

The solution involves forming a monolithic three-dimensional memory device with a lower stack structure comprising alternating insulating and sacrificial layers, followed by an upper stack structure, and creating a memory stack structure with a collar electrode that laterally surrounds the memory stack, providing enhanced vertical extent and electrical connectivity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If a vertical stack structure with alternating insulating and conductive layers is formed, then memory density is improved, but manufacturing complexity increases

Engineering Contradiction:
Improvememory densityVSAvoidmanufacturing complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The memory device is divided into multiple alternating layers of insulating material and conductive material, creating a segmented vertical stack structure. This segmentation enables high memory density by stacking multiple memory cells vertically, with each layer serving a specific functional purpose in the memory cell operation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from planar two-dimensional memory architecture to three-dimensional vertical stacking. By adding the vertical dimension with alternating layers extending in the vertical direction, the device achieves higher storage density without increasing footprint area, effectively utilizing spatial dimensions for memory expansion.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If a collar electrode with greater vertical extent is formed, then electrical connectivity is improved, but device complexity increases

Engineering Contradiction:
Improveelectrical connectivityVSAvoidelectrode structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The collar electrode is formed to laterally surround the memory stack structure before final assembly and operation. This preliminary formation ensures proper electrical connectivity is established in advance, facilitating reliable charge transfer and control gate coupling without requiring complex post-assembly adjustments.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The collar electrode acts as an intermediary structure that laterally surrounds the memory stack, providing a bridging connection between different electrical components. This intermediate electrode structure facilitates controlled electrical coupling between control gates and charge storage regions while maintaining structural integrity.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS9570463B1Multilevel memory stack structure with joint electrode having a collar portion and methods for manufacturing the same
Publication Date: 2017.02.14 SANDISK TECHNOLOGIES LLC
  • US9570463B1 patent drawing
  • US9570463B1 patent drawing
  • US9570463B1 patent drawing

AI summary

A three-dimensional memory device including multiple stack structures can be formed with a joint region electrode, which is an electrode formed at a joint region located near the interface between an upper stack structure and a lower stack structure. A memory stack structure is formed through the multiple stack structures. The joint region electrode laterally surrounds a portion of the memory stack structure in proximity to the interface between different stack structures. The joint region electrode includes a layer portion having a thickness and a collar portion that laterally surrounds the memory stack structure and having a greater vertical extent than the thickness of the layer portion. The increased vertical extent of the collar portion with respect to the vertical extent of the layer portion provides enhanced control of a portion of a semiconductor channel in the memory stack structure located near the interface between different stack structures.