Collective-Compute Pipelining for Segmented ML Tensor Operations

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing compilers face challenges in efficiently pipelining collective operations and compute operations in integrated circuit devices, particularly in artificial neural networks, due to data dependencies and resource conflicts between direct memory access and processor resources.

Innovation Solution

The proposed solution involves tiling input data and performing collective operations in a segment-first order, allowing for parallel execution of compute operations, thereby optimizing resource utilization and enabling efficient pipelining of collective and compute operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If collective operations are performed before compute operations in sequence, then data dependencies are satisfied, but resource utilization efficiency deteriorates due to inability to parallelize

Engineering Contradiction:
Improvedata dependency satisfactionVSAvoidresource utilization efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The input data is divided into multiple segments (e.g., first segment, second segment), and collective operations are performed on each segment independently. This segmentation allows different segments to be processed in parallel by different workers, enabling compute operations to overlap with collective operations and improving resource utilization while maintaining data dependency satisfaction within each segment.

Inventive Principle:
Principle #1Segmentation

2Reliability

If workers wait for collective operations to complete before executing compute operations, then data correctness is ensured, but execution time increases due to idle processor resources

Engineering Contradiction:
Improvedata correctnessVSAvoidexecution time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

Collective operations are performed on data segments in advance before compute operations are needed. By pre-processing segments and making results available beforehand, workers can immediately execute compute operations without waiting, eliminating idle time while ensuring data correctness through proper synchronization barriers between segments.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system maintains continuous useful action by overlapping collective operations on one segment with compute operations on another segment. This pipelining approach ensures that workers are continuously productive, with compute operations executing during collective operations on different segments, thereby reducing total execution time while maintaining data correctness through proper dependency management.

Inventive Principle:
Principle #20Continuity of useful action

3Device complexity

If data is processed in full-batch mode, then simplicity is maintained, but scalability deteriorates for large artificial neural networks with model parallelism

Engineering Contradiction:
Improveprocessing simplicityVSAvoidscalability for model parallelism
Core Design Contradiction:
Device complexityVSAdaptability or versatility

Solution Approach 1:

Data is segmented into multiple chunks that can be independently processed by different workers in a model parallelism setup. Each worker processes its assigned segment through collective and compute operations, allowing the system to scale to large neural networks while maintaining a simple processing pattern within each worker. The segmentation enables horizontal scaling without increasing the complexity of individual worker logic.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS12561120B1Collective operation and compute operation pipelining
Publication Date: 2026.02.24 AMAZON TECH INC
  • US12561120B1 patent drawing
  • US12561120B1 patent drawing
  • US12561120B1 patent drawing

AI summary

Techniques for collective operation and compute operation pipelining on integrated circuit devices configured to perform operations associated with machine learning models are described herein. A first node or integrated circuit device can generate a first input subtensor and a second input subtensor based on the first input tensor. Several collective operations and compute operations can be performed on the first input subtensor and second input subtensor in combination with input subtensors from other integrated circuit devices to generate output subtensors. The first node can generate an output tensor based on the output subtensors.