Color-Aware DPT Routing for Semiconductor Wire Density
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Solution Overview
Problem
Current semiconductor manufacturing processes face challenges in achieving high resolution and density due to limitations in light source wavelength and intensity, as well as imprecision in wire spacing, leading to potential disconnections or connections between wires.
Innovation Solution
The implementation of Double Patterning Technology (DPT) using multiple masks to form multiple patterns within a single metal layer, with natively color-aware routing that employs predefined tracks with specific color assignments to ensure minimum spacing requirements are met, thereby achieving higher resolution and density.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the wavelength of light is decreased to improve resolution, then the resolution of wires is improved, but the number of viable light sources is limited and equipment replacement is expensive
Solution Approach 1:
The patent applies segmentation by dividing a single lithography exposure into two separate steps using two different masks (first mask and second mask). Each mask forms a subset of the final pattern, allowing the use of existing longer-wavelength light sources while achieving the resolution of shorter wavelengths. This segmented approach to pattern formation resolves the contradiction by maintaining compatibility with existing equipment while improving effective resolution.
Solution Approach 2:
The patent uses preliminary action by pre-forming a first set of patterns (mandrels) using the first mask before forming the second set of patterns using the second mask. The first pattern layer serves as a preliminary structure that enables the subsequent formation of the final high-density interconnect pattern. This preliminary patterning allows the system to work around light source limitations by preparing the substrate in advance for the second exposure.
2Adaptability or versatility
If the density of cells increases to improve circuit complexity, then the circuit functionality is improved, but the wire spacing becomes tighter and resolution requirements increase
Solution Approach 1:
The patent segments the wiring layer into two distinct pattern sets formed by two separate masks. This segmentation allows high cell density to be achieved because the two pattern sets can be interleaved more closely than a single pattern set could be. The segmentation strategy enables tighter effective spacing by distributing the wiring density across two separately-formed pattern layers.
Solution Approach 2:
The patent introduces an additional dimension in the pattern formation process by using two masks to create two interleaved pattern sets within the same physical layer. This dimensional approach to pattern generation (adding the mask layer dimension) enables higher effective density by utilizing the vertical stacking of patterns from two different exposure steps, allowing circuits to achieve higher complexity without proportionally increasing wire spacing requirements.
3Reliability
If adequate spacing between wires is maintained to prevent disconnections, then wire reliability is improved, but wiring density decreases
Solution Approach 1:
The patent segments the wiring function into two interleaved pattern sets, each formed by a separate mask. Within each pattern set, wires maintain adequate spacing for reliability. Between the two pattern sets, the wires can be positioned much closer together since they are formed by different masks with different process variations. This segmentation allows the system to achieve high overall density while maintaining reliability within each segment.
Solution Approach 2:
The patent applies local quality by having different spacing requirements for different pattern sets. Wires within the same pattern set (same color) maintain larger spacing for reliability, while wires from different pattern sets (different colors) can be positioned closer. This local differentiation of spacing quality allows the system to optimize both reliability and density by applying appropriate spacing rules locally to each pattern set rather than using a uniform spacing approach throughout.
Data Source
AI summary
A route technique includes: receiving an input specifying a plurality of semiconductor device components and their logical connections; determining route information pertaining to a plurality of routes that connect in one or more metal layers the semiconductor device components according to their logical connections, the determination being based at least in part on a plurality of predefined tracks associated with a metal layer; and outputting at least a portion of the route information. A first portion of the plurality of predefined tracks corresponds to a first color and a second portion of the plurality of predefined tracks corresponds to a second color.