Column ADC DFF Transfer Circuit for High-Speed Imaging
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional solid-state imaging devices face limitations in high-speed signal reading due to floating capacitance and increased circuit complexity, which degrades signal output and requires additional circuit elements like sense amplifiers, making miniaturization challenging.
Innovation Solution
The implementation of a solid-state imaging device with AD converters in each column, featuring a comparator and a counter section with DFFs that perform up-count and down-count operations, and a transfer circuit with series-coupled DFFs to simplify the circuit configuration and reduce signal degradation, allowing for high-speed digital conversion without extra sense amplifiers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a single comparator and additional circuit elements are used in each column AD converter, then analog-to-digital conversion can be performed, but the number of circuit elements increases and circuit area expands
Solution Approach 1:
The patent merges the comparator and counter section into a unified AD converter structure where the comparator's output directly controls the counter operations. This integration eliminates the need for separate sense amplifiers and reduces the number of discrete circuit elements while maintaining full ADC functionality.
Solution Approach 2:
The counter section serves multiple functions: it acts as both the conversion counter and the output register, eliminating the need for separate output latches. The same counter circuitry that performs the conversion also holds and transfers the digital output, reducing overall circuit complexity.
2Reliability
If sense amplifiers are added to the horizontal data bus, then signal degradation can be compensated, but the circuit area increases and miniaturization becomes difficult
Solution Approach 1:
The patent extracts the sense amplifier function from the horizontal data bus architecture and replaces it with direct digital transfer using the counter output. By removing the analog data bus and sense amplifier requirement, the design eliminates these components while maintaining signal integrity through direct digital output from the counter section.
3Quantity of substance
If floating capacitance is present in the solid-state imaging device, then photoelectric conversion can be performed, but reading speed is limited
Solution Approach 1:
The patent replaces the analog signal transfer mechanism (which is limited by floating capacitance) with a direct digital conversion and transfer system. By converting the analog signal to digital within the pixel column and transferring digital data, the system eliminates the speed limitations imposed by analog signal propagation through capacitive elements.
4Ease of operation
If interconnect resistance and capacitance are present, then signal transfer between circuit elements can occur, but skew between bits increases and high-speed transfer is limited
Solution Approach 1:
The patent segments the signal processing into independent column-based ADC units, each performing conversion locally. This segmentation allows each column to operate independently with its own comparator and counter, eliminating the need for long interconnects that cause skew. The digital outputs from each column can be transferred in parallel without suffering from cumulative interconnect delays.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enables stable high-speed digital conversion, reduces circuit area, and minimizes signal degradation, facilitating faster and more reliable signal transfer while avoiding the need for additional circuit elements, thus enhancing the device's operational speed and miniaturization capabilities.
Implementation Method 1
an analog signal obtained in a pixel circuit as a result of photoelectric conversion
Data Source
AI summary
A solid-state imaging device includes an imager including pixels arranged in a matrix, and analog to digital (AD) converters, each of which is provided in each pixel column and converts a signal voltage read from one of the pixels located in the column to a digital value. Each of the AD converters includes a comparator and a counter section including a counter circuit, which receives a comparison result of the comparator and includes a first D flip-flop (DFF) for n-bits, and a transfer circuit, which includes a second DFF for n-bits holding and outputting a count value of the counter circuit. The second DFFs provided in the columns are coupled in series to form a transfer section transferring the signal voltage which has been digitally converted.