Per-Column ADC Gain Calibration for Fixed-Pattern Noise Reduction
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Solution Overview
Problem
Conventional solid-state imaging elements with single slope type ADCs are prone to fixed pattern noise due to dispersion of analog gains in per-column ADCs, especially when power source voltage is lowered to reduce power consumption, leading to vertical stripe-shaped noise.
Innovation Solution
A solid-state imaging element with a test signal source, analog-to-digital converter, input switching section, correction value calculation section, and correction section that generates and processes test signals to correct analog gain errors, reducing fixed pattern noise by adjusting capacity ratios and calibrating gain domains based on light exposure quantities.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If single slope type ADCs with simple configuration are used, then circuit scale is reduced, but fixed pattern noise occurs due to dispersion of analog gains
Solution Approach 1:
The patent applies preliminary action by performing gain correction before image data processing. A correction value calculation section computes correction values based on test signals and initial digital signals to compensate for analog gain dispersion. This preliminary correction eliminates fixed pattern noise before the main imaging operation, allowing the use of simple single slope ADCs without suffering from their inherent gain dispersion issues.
2Use of energy by moving object
If power source voltage of comparator is lowered to reduce power consumption, then energy consumption is reduced, but fixed pattern noise of vertical stripe shape is likely to occur
Solution Approach 1:
The patent implements feedback by using the output digital signals to calculate correction values that are fed back to correct the analog gain errors. The correction value calculation section continuously monitors the relationship between test signals and digital outputs, computes the necessary correction, and applies it to eliminate vertical stripe noise. This feedback mechanism allows the system to maintain low power consumption while compensating for the noise issues that arise from reduced comparator voltage.
3Measurement precision
If correction values are calculated for all gain domains with both high and low level test signals, then correction accuracy is improved, but calibration time period is extended
Solution Approach 1:
The patent applies partial action by selectively applying full correction procedures only to a reference gain domain, while using simplified correction methods for other gain domains. The correction value calculation section performs comprehensive high and low level test signal measurements for the reference domain to establish accurate correction values, then uses these as a basis for correcting other domains. This partial approach maintains sufficient correction accuracy while significantly reducing the total calibration time compared to treating all domains equally.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively eliminates fixed pattern noise and shortens calibration time while improving correction accuracy and linearity, enhancing image quality by adjusting analog gains and capacity ratios.
Implementation Method 1
a comparator that compares the analog signal with a predetermined ramp signal, and outputs a result of the comparison, and the comparator may include a differential amplification circuit that amplifies a difference between a predetermined reference voltage and a voltage of a predetermined node, and outputs the amplified difference as the comparison result
Implementation Method 2
a vertical signal line-side capacity that is inserted between the predetermined node and the input switching section, a ramp-side capacity that is inserted between the predetermined node and a digital-to-analog converter that generates the ramp signal, and a switch that changes a capacity ratio of the vertical signal line-side capacity and the ramp-side capacity according to a predetermined control signal
Data Source
AI summary
In a solid-state imaging element equipped with per-column ADCs, noise is reduced. A test signal source generates a test signal of a predetermined level. An analog-to-digital converter increases/decreases an analog signal according to an analog gain selected from among a plurality of analog gains, and converts the increased/decreased analog signal to a digital signal. An input switching section inputs, as the analog signal, either a test signal or a pixel signal to the analog-to-digital converter. A correction value calculation section obtains, on the basis of the test signal and the digital signal, a correction value for correcting an error in the selected analog gain, and outputs the correction value. A correction section corrects the digital signal according to the outputted correction value.


