Column ADC On-Chip Test Mode for CMOS Image Sensor Noise Analysis

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

High-resolution CMOS image sensors face challenges with row-wise and column-wise noise sources, such as power supply movement and column fixed-pattern noise, which limit sensitivity and introduce artifacts in output, and existing testing methods for column-parallel ADCs are either limited or time-consuming.

Innovation Solution

An image processing system with an on-chip test mode that includes a pixel array with regular and test pixel columns, column ADCs, and a switching block to provide output signals to column ADCs in normal and test modes, allowing for performance testing without external analog signals or light irradiation, using a test pixel column that generates signals with minute voltage differences between rows.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If external analog signals are used to test column ADCs, then testing can be performed, but the testing method is limited and requires external equipment

Engineering Contradiction:
ImproveADC performance testing capabilityVSAvoidtesting system complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The test pixel column serves itself by generating test signals internally through its own photoelectric conversion elements, eliminating the need for external analog signal sources. The generated signals are then routed through the switching block to the column ADCs for self-testing, making the system self-sufficient for performance evaluation.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The test pixel column is integrated into the existing pixel array structure and shares common components including the switching block and column ADCs with regular pixel columns. This multi-functional design allows the same hardware infrastructure to serve both imaging functions and ADC testing functions without requiring separate dedicated test equipment.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If light irradiation is used to test column ADCs, then performance testing can be performed, but the testing process takes much time due to controlled intensity steps

Engineering Contradiction:
ImproveADC performance testing accuracyVSAvoidtesting time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent replaces the mechanical/optical approach of controlled light irradiation with an electrical signal generation approach. The test pixel column generates electrical signals directly through its photoelectric conversion elements, which are then processed by the column ADCs. This substitution eliminates the time-consuming sequential intensity control steps required in optical testing methods.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Productivity

If column-parallel ADCs are used in high resolution sensors, then higher data conversion rates are achieved, but row-wise and column-wise noise sources increase

Engineering Contradiction:
Improvedata conversion rateVSAvoidrow-wise and column-wise noise
Core Design Contradiction:
ProductivityVSObject-generated harmful factors

Solution Approach 1:

The patent extracts and isolates noise sources by dedicating specific pixel columns (test pixel columns) to generate test signals that can reveal noise characteristics. By separating test functions from regular imaging functions and using the switching block to route signals selectively, the system can identify and characterize noise sources without affecting normal high-speed data conversion operations in regular pixel columns.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS8823850B2Image processing system with on-chip test mode for column ADCs
Publication Date: 2014.09.02 SK HYNIX INC
  • US8823850B2 patent drawing
  • US8823850B2 patent drawing
  • US8823850B2 patent drawing

AI summary

An image processing system includes a pixel array including a plurality of regular pixel columns and at least one test pixel column, a plurality of column analog-to-digital converters (ADCs) configured to correspond to the regular pixel columns and convert analog input signals into digital signals, and a switching block configured to provide output signals of the regular pixel columns to input ends of the corresponding column ADCs in a normal mode, and provide in common an output signal of the test pixel column to the input ends of the column ADCs in a test mode, wherein the test pixel column generates signals having a minute voltage different from one row to another row.