Column-Level CDS Charge Transfer Amplifier for Low-Noise Image Sensors
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Solution Overview
Problem
Conventional CMOS image sensors face challenges in reducing 1/f noise and random telegraph noise due to capacitive coupling between the floating diffusion and transfer gate, limiting the minimum required settling time and increasing readout noise, especially in low-light and photon-counting applications.
Innovation Solution
Incorporating a doped pinning region within or adjacent to the floating diffusion to reduce effective capacitive coupling between the floating diffusion and the transfer gate, and optionally the reset gate, to create a pinned transfer gate and/or reset gate, which isolates the charge transfer path from the surface region, thereby reducing overlap parasitic capacitance and voltage feed-through.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional CMOS image sensors are used with standard capacitive coupling between floating diffusion and transfer gate, then the structure is simple and easy to manufacture, but the readout noise is high due to 1/f noise and random telegraph noise
Solution Approach 1:
The pixel structure is segmented into distinct regions: a first doped region for charge storage, a second doped region for low-noise amplification, and an isolated floating diffusion region. This segmentation separates the charge transfer path from the surface region, reducing parasitic capacitance and noise coupling between the floating diffusion and transfer gate.
Solution Approach 2:
Different doped regions are created with specific doping types and concentrations optimized for their local functions. The first doped region has properties optimized for charge storage, the second for low-noise operation, and the floating diffusion is isolated to minimize noise coupling. Each region has tailored electrical properties to reduce 1/f noise and random telegraph noise locally.
2Productivity
If the settling time is reduced to improve imaging speed, then the productivity increases, but the noise reduction effectiveness decreases
Solution Approach 1:
The harmful parasitic capacitance and noise coupling are extracted from the system by isolating the floating diffusion region from the transfer gate through separate doped regions. This extraction removes the source of 1/f noise and random telegraph noise, allowing fast settling without compromising noise reduction.
Solution Approach 2:
The first and second doped regions act as intermediary structures between the charge storage node and the floating diffusion. These intermediary regions provide a controlled charge transfer path that is electrically isolated from the floating diffusion, enabling fast charge transfer while preventing noise coupling.
3Speed
If the capacitive coupling between floating diffusion and transfer gate is increased to improve charge transfer efficiency, then the charge transfer speed increases, but the voltage feed-through and readout noise increase
Solution Approach 1:
The charge transfer is moved from a planar capacitive coupling to a vertical charge transfer path through doped regions. The charge transfers vertically through the first and second doped regions to the isolated floating diffusion, separating the charge transfer dimension from the noise coupling dimension. This dimensional change enables fast transfer without increased parasitic capacitance.
Solution Approach 2:
The floating diffusion is electrically isolated and effectively copied or replicated in its electrical characteristics through the doped regions, allowing charge transfer without direct capacitive coupling. The doped regions replicate the charge transfer function while eliminating the harmful parasitic capacitance to the transfer gate.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables shorter correlated double sampling times, lower noise levels, and higher conversion gain by minimizing feed-through voltage, effectively reducing readout noise and enhancing imaging performance in low-light conditions.
Implementation Method 1
reducing 1/f noise and random telegraph noise due to capacitive coupling between the floating diffusion and transfer gate
Implementation Method 2
reducing overlap parasitic capacitance and voltage feed-through
Data Source
AI summary
Correlated double sampling column-level readout of an image sensor pixel (e.g., a CMOS image sensor) may be provided by a charge transfer amplifier that is configured and operated to itself provide for both correlated-double-sampling and amplification of floating diffusion potentials read out from the pixel onto a column bus after reset of the floating diffusion (i) but before transferring photocharge to the floating diffusion (the reset potential) and (ii) after transferring photocharge to the floating diffusion (the transfer potential). A common capacitor of the charge transfer amplifier may sample both the reset potential and the transfer potential such that a change in potential (and corresponding charge change) on the capacitor represents the difference between the transfer potential and reset potential, and the magnitude of this change is amplified by the charge change being transferred between the common capacitor and a second capacitor selectively coupled to the common capacitor.