Column Driver DAC With Current-Offset Buffer for Smaller IC Area
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Solution Overview
Problem
The size of digital-to-analog (DAC) conversion circuits in column drivers for flat panel displays increases with the number of gray levels and resolution, leading to increased production costs due to larger integrated circuit areas, and conventional buffer amplifiers grow in size as they process more gray levels.
Innovation Solution
A digital-to-analog conversion circuit with a buffer amplifier that includes two input terminals, where the buffer amplifier generates a current offset by controlling currents based on lower bits of digital data, dividing the range between adjacent analog voltages into multiple intervals, and outputs one voltage per interval, using a current digital-to-analog converter with cascaded current dividers and switching transistors to minimize area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the number of gray levels is increased to improve display quality, then the resolution and image quality are improved, but the area of the column driver IC increases
Solution Approach 1:
The digital data is segmented into upper bits and lower bits, with the DAC processing upper bits to generate two adjacent analog voltages and the buffer amplifier processing lower bits to select between them. This segmentation allows the buffer amplifier to use a fixed small number of transistors regardless of total gray level count, resolving the area increase problem while maintaining high resolution capability
Solution Approach 2:
The invention transitions from a conventional single-stage buffer amplifier architecture to a two-stage architecture where the DAC operates on upper bits and the buffer amplifier operates on lower bits. This dimensional separation of bit processing allows the buffer amplifier size to remain constant while supporting increased gray levels through the DAC's higher-resolution output
2Adaptability or versatility
If the number of transistors at the input terminal is doubled to process more gray levels, then the gray level processing capability is improved, but the buffer amplifier area increases
Solution Approach 1:
The buffer amplifier's input terminal uses a fixed number of transistors (e.g., 4 transistors for 2 gray levels) regardless of the total number of gray levels supported by the system. The segmentation of bit processing allows this fixed transistor count to handle variable gray level requirements through coordination with the DAC processing upper bits
Solution Approach 2:
The system dynamically assigns different functions to different components based on bit significance: the DAC dynamically adjusts its output based on upper bits while the buffer amplifier dynamically selects between its two input voltages based on lower bits. This dynamic functional assignment allows the buffer amplifier to maintain a fixed small size while adapting to various gray level requirements
Data Source
AI summary
A digital-to-analog conversion circuit includes a digital-to-analog converter and a buffer amplifier. The digital-to-analog converter receives upper bits of digital data and a plurality of analog voltages and is configured to output two adjacent analog voltages of the plurality of analog voltages based on the upper bits. The buffer amplifier includes two input terminals. One of the input terminals receives one of the two adjacent analog voltages and the other input terminal receives the other adjacent analog voltage. The buffer amplifier is configured to generate a current offset by controlling a current flowing into each of the two input terminals based on lower bits of the digital bits.