Display Column Driver Switched Buffers Slew Rate

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Solution Overview

Problem

Conventional display driver ICs face challenges in achieving a high slew rate while maintaining low power consumption, as the increased load capacitance and reduced horizontal period necessitate faster slewing times, but this often results in higher current consumption and longer slewing times due to the use of multiple transmission switches.

Innovation Solution

The proposed column driver incorporates an improved external switch construction with upper and bottom output buffers, utilizing a first switch group to provide input signals and a second switch group to feedback output signals, connected between different voltage rails to optimize slew rate and power consumption, featuring a high-slew-rate and low-power design.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If multiple transmission switches are used in the output buffer, then the load capacitance can be driven, but the slew rate decreases and slewing time increases

Engineering Contradiction:
Improveslew rateVSAvoidnumber of transmission switches
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent combines multiple transmission switches into a single external switch construction that connects between voltage rails. This merging approach maintains the ability to drive load capacitance while reducing the total number of switches, thereby improving slew rate and reducing slewing time compared to using multiple separate transmission switches.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent introduces voltage rails as intermediary elements between the output buffer and the load. By connecting the external switch between different voltage rails (e.g., VDD and VSS), the circuit achieves efficient voltage transitions and current control, improving the slew rate without requiring multiple complex transmission switch stages.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Loss of time

If the slew rate is increased to reduce slewing time, then the horizontal period is reduced, but the current consumption increases

Engineering Contradiction:
Improveslewing timeVSAvoidcurrent consumption
Core Design Contradiction:
Loss of timeVSUse of energy by moving object

Solution Approach 1:

The patent optimizes the external switch construction by changing key parameters such as the switch connection configuration between voltage rails and the transistor sizing. These parameter changes enable achieving high slew rate and fast slewing time while controlling current consumption, as the switch is strategically positioned to provide efficient current paths during voltage transitions.

Inventive Principle:
Principle #35Parameter changes

3Power

If conventional output buffer construction is used, then the circuit is simple, but the power consumption is high and slew rate is limited

Engineering Contradiction:
Improveslew rateVSAvoidpower consumption
Core Design Contradiction:
PowerVSUse of energy by stationary object

Solution Approach 1:

The patent implements a dynamic external switch construction that actively manages current flow between voltage rails based on the operating state. The switch configuration allows the circuit to adapt its power consumption and slew rate characteristics dynamically, achieving high performance when needed while maintaining efficiency during normal operation, unlike static conventional designs.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS9905185B2Switched column driver of display device
Publication Date: 2018.02.27 MAGNACHIP SEMICON LTD
  • US9905185B2 patent drawing
  • US9905185B2 patent drawing
  • US9905185B2 patent drawing

AI summary

A column driver of a display device provides a high slew rate with lowered power requirements by using external switches connected to upper and bottom output buffers. The upper output buffer is driven between a first voltage rail and a second voltage rail, and outputs a first output signal in response to a first input signal and a second input signal. The bottom output buffer is driven between the second voltage rail and a third voltage rail, and outputs a second output signal in response to a third input signal and a fourth input signal. A first switch group selectively provides input for the upper output buffer and the bottom output buffer. A second switch group feeds back the first and the second output signals to the first or the second input terminal of each of the upper output buffer and the bottom output buffer.