Column-Layered LDPC Decoder for Differential Decoding
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Solution Overview
Problem
The interaction between Low-Density Parity Check (LDPC) decoders and differential decoders in communication systems is complicated, leading to increased memory costs and implementation complexity due to the presence of two different decoding domains, especially in high-rate LDPC codes used in optical communications.
Innovation Solution
Implementing a column-layered LDPC decoding scheme in conjunction with differential decoding, where the LDPC code's parity-check matrix is processed column by column, facilitating a more natural interaction between the LDPC and differential trellis decoders, and utilizing Quasi-Cyclic or protograph LDPC codes to reduce operational overhead and memory requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If row-layered LDPC decoding is used with differential decoding, then decoding performance is maintained, but device complexity and memory costs increase due to complicated interaction between two different decoding domains
Solution Approach 1:
The patent inverts the conventional row-layered processing approach by implementing column-layered LDPC decoding. Instead of processing rows of the parity-check matrix sequentially, the decoder processes columns, which naturally aligns with the differential decoding structure. This inversion simplifies the interaction between LDPC and differential decoders, reducing VLSI implementation complexity while maintaining decoding performance.
Solution Approach 2:
The patent introduces an intermediary processing structure where the column-layered LDPC decoder acts as a bridge between the differential decoder and the LDPC decoding process. By processing columns and using appropriate memory structures for bypassing input values, the intermediary structure facilitates smooth interaction between the two decoding domains without requiring complex additional memory resources.
2Reliability
If row-layered LDPC decoding is used with differential decoding, then decoding functionality is achieved, but memory costs increase due to need to bypass input values through digital circuit
Solution Approach 1:
By inverting the processing direction from row-layered to column-layered, the patent eliminates the need for complex bypass memory structures. The column-layered approach naturally processes data in an order that aligns with the differential decoding requirements, removing the need to store and retrieve previous input values through additional digital circuit memory.
3Productivity
If conventional LDPC decoding is used, then decoding speed is maintained, but interoperability with differential decoders is complicated
Solution Approach 1:
The patent inverts the conventional decoding approach to column-layered processing, which inherently improves interoperability with differential decoders. This structural inversion maintains decoding speed by preserving the iterative decoding framework while naturally aligning the processing order with differential decoding requirements, thereby enhancing adaptability without sacrificing productivity.
Data Source
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AI summary
Embodiments relate to a decoder for iteratively decoding a received signal generated by encoding an LDPC code word with a differential code. The decoder comprises a differential decoder (118) operable to provide extrinsic probability information on the LDPC code word based on the received signal and a-priori probability information on the received signal, and a column-layered LDPC decoder (122) operable to process columns of the LDPC code's parity check matrix based on the extrinsic probability information from the differential decoder (118) to obtain updated a-priori probability information for the differential decoder (118). Further, embodiments also relate to an encoder (106) for encoding an LDPC code word in accordance with a parity check matrix of an LDPC code, wherein the parity check matrix ( H ) is constructed from a lifting matrix ( A ) by replacing each entry of the lifting matrix ( A ) with either an all-zero matrix of size S × S or a permutation matrix of size S × S or a superposition of multiple permutation matrices of size S × S , depending on the entry of the lifting matrix ( A ).