Column-Parallel AD Conversion in Solid-State Imaging Sensors
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Solution Overview
Problem
Conventional solid-state imaging devices face challenges in achieving high-speed digital output with high resolution due to internal stray capacity limitations, requiring high-frequency clock signals that are technically difficult to implement stably.
Innovation Solution
The solution involves a solid-state imaging device with plural light receiving elements and AD converters arranged in a matrix, where each AD converter includes a reference voltage generator, comparators that compare signal voltages with reference voltages in parallel, and an outputting circuit that generates digital signals without needing high-speed clocks, allowing for high-speed and high-resolution digital output.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a high-frequency clock signal is used to achieve high-speed digital output, then the read-out speed is improved, but the circuit stability deteriorates and implementation becomes technically challenging
Solution Approach 1:
The patent divides the imaging device into multiple pixel circuits arranged in a matrix, with each pixel circuit independently performing photoelectric conversion and AD conversion. This segmentation allows parallel processing of multiple signals simultaneously, achieving high-speed output without requiring high-frequency clock signals for sequential processing.
Solution Approach 2:
The patent transitions from sequential one-dimensional processing to parallel two-dimensional matrix processing. By arranging pixel circuits and AD converters in a matrix structure where multiple conversion operations occur simultaneously across different columns, the system achieves high throughput without increasing clock frequency.
2Measurement precision
If the number of pixels is increased to improve resolution, then the measurement precision is improved, but the read-out speed deteriorates due to internal stray capacity
Solution Approach 1:
The patent segments the large number of pixels into multiple independent pixel circuits organized in a matrix structure. Each pixel circuit is paired with its own AD converter, allowing simultaneous conversion of multiple pixel signals. This segmentation eliminates the bottleneck of sequential read-out that would occur with increased pixel count.
Solution Approach 2:
The patent performs photoelectric conversion and AD conversion within each pixel circuit before signal read-out. By completing the conversion process locally at each pixel circuit in advance, the system prepares digital signals ready for parallel output, eliminating delays associated with analog signal transmission and centralized conversion.
3Reliability
If internal AD conversion is implemented to reduce stray capacity influence, then the signal quality is improved, but the device complexity increases
Solution Approach 1:
The patent distributes AD conversion functionality across multiple independent pixel circuits rather than implementing a single centralized AD converter. Each pixel circuit contains its own simple AD conversion unit, which reduces the complexity of any single conversion unit while collectively handling conversion for all pixels. This segmented approach simplifies the overall system architecture.
Solution Approach 2:
Each pixel circuit performs its own photoelectric conversion and AD conversion independently without requiring external conversion units. This self-service approach eliminates the need for complex external signal routing and conversion infrastructure, reducing overall system complexity while improving signal quality by converting signals close to their source.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables high-speed digital output without using high-frequency clocks, achieving high-resolution digital signals efficiently by narrowing the comparison range through parallel comparison and sequential processing, thus overcoming the limitations of conventional technologies.
Implementation Method 1
plural light receiving elements provided in a matrix each of which generates a signal voltage based on an intensity of received light
Data Source
AI summary
The present invention provides a solid-state imaging device which can output a digital signal at a high speed without using a high-speed clock. The solid-state imaging device includes light receiving elements provided in an array and generating signal voltages based on light intensity of received light and AD converters each of which is provided in each of columns in the array. Each of the AD converters includes: a reference voltage generating unit (10) generating reference voltages; comparators (11a through 11c) comparing in parallel a current signal voltage which is one of signal voltages generated by the light receiving elements in the respective matrix columns with the reference voltages generated by the reference voltage generating unit; a digital signal generating circuit (23) generating a digital signal showing a result of the comparison and outputting the digital signal out of the AD converter.