Per-Column Ramp ADC Calibration for Missing Code Correction

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Solution Overview

Problem

Sub-ranged ramp ADCs in imaging devices suffer from nonlinearity issues due to parasitic elements, leading to differential nonlinearity (DNL) performance degradation, resulting in undesired artifacts in the final image.

Innovation Solution

A digital correction/calibration algorithm is implemented to reduce DNL by adding a calibrated correction value to ADC output codes corresponding to input levels greater than the coarse threshold, effectively shifting the ADC transfer curve and removing missing codes, thereby improving linearity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If sub-ranged ramp ADC architecture is used to achieve improved frame rates, then productivity is improved, but measurement precision deteriorates due to nonlinearity issues and DNL performance degradation

Engineering Contradiction:
Improveframe rateVSAvoidDNL performance
Core Design Contradiction:
ProductivityVSMeasurement precision

Solution Approach 1:

The patent applies preliminary action by performing calibration operations before normal ADC operation to measure and store correction values that compensate for parasitic capacitance effects. The calibration process characterizes the ADC transfer curve and stores correction data in lookup tables, which are then applied during normal operation to eliminate DNL errors and improve measurement precision while maintaining high frame rates

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements feedback by using measured DNL errors from calibration to generate correction values that are applied to subsequent ADC conversions. The system continuously compensates for nonlinearity by comparing actual transfer characteristics against ideal behavior and applying real-time corrections based on stored calibration data, thereby maintaining measurement precision during high-speed operation

Inventive Principle:
Principle #23Feedback

2Speed

If sub-ranged ramp ADC is used to achieve higher speed performance, then speed is improved, but manufacturing precision deteriorates due to artifacts and nonlinearity in the ADC transfer curve

Engineering Contradiction:
ImproveADC conversion speedVSAvoidADC transfer curve linearity
Core Design Contradiction:
SpeedVSManufacturing precision

Solution Approach 1:

The patent applies parameter changes by dynamically adjusting the ADC transfer curve through digital correction based on calibration measurements. The system characterizes the actual transfer characteristics and applies correction values that modify the effective transfer function, transforming the non-linear behavior into a corrected linear response without changing the physical ADC architecture or slowing down conversion speed

Inventive Principle:
Principle #35Parameter changes

3Productivity

If sub-ranged ramp ADC architecture is implemented, then productivity is improved, but reliability deteriorates due to missing codes and artifacts in image data

Engineering Contradiction:
Improveframe rateVSAvoidimage data accuracy
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent implements feedback by using calibration measurements to generate correction values that are applied to all subsequent ADC conversions. The system continuously compensates for nonlinearity and missing codes by comparing actual transfer characteristics against ideal behavior, applying real-time corrections based on stored calibration data to ensure reliable and accurate image data output

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent replaces physical hardware corrections with digital signal processing solutions. Instead of modifying the physical ADC architecture to eliminate parasitic effects, the system uses digital calibration and correction algorithms to compensate for nonlinearity, missing codes, and artifacts, thereby maintaining high frame rates while improving image data reliability through software-based corrections

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS8963759B2Imaging systems with per-column analog-to-digital converter non-linearity correction capabilities
Publication Date: 2015.02.24 SEMICON COMPONENTS IND LLC
  • US8963759B2 patent drawing
  • US8963759B2 patent drawing
  • US8963759B2 patent drawing

AI summary

Electronic devices may include image sensors having image sensor pixels that are coupled to analog-to-digital converters (ADCs). Each ADC may be a sub-ranged ramp ADC that uses a first set of reference voltages to determine a coarse code and a second set of ramping voltages to determine a fine code. In the presence of parasitic capacitances, the reference voltages and the ramp voltages exhibit mismatch that causes the ADC to exhibit non-idealities such as missing codes. Calibration operations may be performed that involve obtaining a first code at a first predetermined input voltage level and obtaining a second code at a second predetermined input voltage level. A code correction value can then be computed based on the first and second codes. The code correction value can be selectively applied to the final ADC code to correct for missing codes.