Column Readout Circuits with Capacitor Storage for Image Sensors
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Solution Overview
Problem
Existing image sensors face challenges in achieving faster processing speeds and better image quality due to insufficient time for pixel operations, leading to image non-uniformities and excessive noise from incomplete correlated double sampling, especially in high-speed applications.
Innovation Solution
The solution involves extending pixel operation time by utilizing additional column capacitor storage and alternating storages for each column, allowing pixel operations to overlap between rows and enabling analog-to-digital conversion during charge transfer processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If row-by-row readout is used to control pixel operations, then image quality can be maintained through systematic processing, but processing speed is limited by the sequential nature of row-by-row operation
Solution Approach 1:
The pixel array is divided into multiple columns, and each column is independently readout through its own column readout circuit. This segmentation allows parallel processing of multiple pixels simultaneously, improving processing speed while maintaining systematic control through column-based organization
Solution Approach 2:
The readout operation transitions from sequential row-by-row processing to parallel column-based processing. By organizing readout along the column dimension rather than the row dimension, multiple pixels can be readout simultaneously, effectively increasing processing speed without extending the overall readout time
2Productivity
If pixel operations are completed quickly to increase processing speed, then productivity improves, but image non-uniformities and noise increase due to incomplete correlated double sampling
Solution Approach 1:
Correlated double sampling is performed in advance during the pixel operation phase before the readout phase begins. By completing the sampling and holding operations beforehand, the system ensures that sufficient time is available for accurate measurement while maintaining fast processing speeds through efficient timing coordination
Solution Approach 2:
The column readout circuit continuously holds the sampled pixel values during the readout process, ensuring that the correlated double sampling is completed without interruption. This continuous holding action maintains measurement accuracy and image quality uniformity while allowing fast sequential readout of multiple columns
3Reliability
If additional column capacitor storage is added to extend pixel operation time, then image quality improves through complete sampling, but device complexity increases
Solution Approach 1:
The column capacitor storage structure serves multiple functions: it stores pixel values during readout, enables correlated double sampling, and provides timing flexibility for complete pixel operations. By making this component multi-functional, the system improves image quality without proportionally increasing device complexity
Solution Approach 2:
The timing parameters of the pixel operations are adjusted to optimize the balance between processing speed and image quality. By changing the timing sequence and duration of operations, the system achieves complete sampling without requiring excessive additional components, thus improving reliability while controlling complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively extends pixel operation time by up to one line time, reducing noise and improving image quality by ensuring complete pixel operations and efficient analog-to-digital conversion, even in high-speed image sensor applications.
Implementation Method 1
Each pixel (2) comprises a light sensitive element, such as a photodiode, to sample light intensity of a corresponding portion of a scene being imaged
Data Source
AI summary
An image sensor includes a pixel array, a plurality of column readout lines, and a plurality of column readout circuits. The pixel array includes a plurality of pixels arranged in a plurality of rows and a plurality of columns. Each of the plurality of column readout lines is connected to a corresponding at least two pixels of the plurality of pixels. Each of the plurality of column readout circuits is connected to a corresponding column readout line of the plurality of column readout lines and includes an amplifier, a first capacitor connected between the corresponding column readout line and an input of the amplifier, and a second capacitor connected between the corresponding column readout line and the input of the amplifier.


