Column Readout Circuitry Power Control via Latch Segmentation

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Solution Overview

Problem

Conventional image sensors waste power by maintaining column readout circuitry active for all pixels, even when only a subset is used, which is inefficient in portable devices and power-saving modes.

Innovation Solution

Implementing per-column latch circuitry to dynamically enable or disable column readout circuits based on the specific mode of operation, allowing only necessary columns to be powered, using a dummy pixel row or global signals to control column readout circuitry.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If column readout circuitry is kept powered on for all pixel columns, then all pixels can be read out simultaneously, but power consumption increases unnecessarily when only a subset of pixels is used

Engineering Contradiction:
Improveframe rateVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The patent divides the column readout circuitry into independently controllable segments, where each column or group of columns can be selectively enabled or disabled. This segmentation allows the system to power only the necessary column circuits when using a sub-array of pixels, thereby reducing power consumption while maintaining the ability to read out active pixels at high frame rates.

Inventive Principle:
Principle #1Segmentation

2Use of energy by moving object

If column readout circuitry is selectively enabled for subset of columns, then power consumption is reduced, but system complexity increases due to additional control circuitry

Engineering Contradiction:
Improvepower consumptionVSAvoidcontrol circuitry complexity
Core Design Contradiction:
Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The patent merges the power control functionality with the existing row and column selection control circuitry. By integrating latch circuits and enable signals into the existing readout control structure, the system achieves selective column powering without adding significant complexity. The control signals for enabling/disabling columns are combined with the existing pixel selection logic.

Inventive Principle:
Principle #5Merging (Combining)

3Speed

If all column circuits are powered on, then readout speed is maximized, but energy efficiency decreases when only subset of pixels are active

Engineering Contradiction:
Improvereadout speedVSAvoidenergy efficiency
Core Design Contradiction:
SpeedVSLoss of energy

Solution Approach 1:

The patent implements dynamic power control for column readout circuits, where the enable state of each column circuit changes based on real-time operational requirements. When a sub-array is selected for imaging, the system dynamically disables power to unused column circuits while maintaining full readout speed for the active columns, thereby optimizing both speed and energy efficiency adaptively.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS9053993B2Imaging systems with selectable column power control
Publication Date: 2015.06.09 SEMICON COMPONENTS IND LLC
  • US9053993B2 patent drawing
  • US9053993B2 patent drawing
  • US9053993B2 patent drawing

AI summary

Electronic devices may include image sensors having image pixel arrays with image pixels arranged in pixel rows and pixel columns. Each pixel column may be coupled to a column line having column readout circuitry. The column readout circuitry on each column line may include signal processing circuitry and a latch circuit. The latch circuit on each column line may be used to selectively enable and disable the signal processing circuitry on that column line. Each latch circuit may be coupled to first and second signal lines for globally enabling and disabling the signal processing circuitry on all of the column lines. Each latch circuit may be coupled to column decoder circuitry. The column decoder circuitry may provide a column-select signal to latch circuits on a chosen subset of column lines that enables the signal processing circuitry on those column lines by setting those latch circuits.