Column Readout Circuit Using Retention Counter to Cut Sensor Area
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Solution Overview
Problem
CMOS image sensors require large layout areas due to the vertical stacking of AD converting parts and memory circuits, which increases the overall chip size and cost.
Innovation Solution
Implement an n-bit asynchronous counter with a retention circuit and signal inverting part in the column reading circuit to perform differential operations without the need for separate memory circuits, allowing parallel processing and reducing the layout area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If AD converting parts and memory circuits are vertically stacked to process pixel signals, then signal processing capability is improved, but layout area increases
Solution Approach 1:
The patent merges the memory circuit function into the asynchronous counter by using the retention circuit to hold the first digital pixel signal. This integration eliminates the need for separate memory circuits while maintaining the ability to perform differential operations, thereby improving signal processing capability without increasing layout area.
Solution Approach 2:
The asynchronous counter is designed to serve multiple functions: it not only performs counting operations for differential signal processing but also acts as a memory element through its retention circuit. This multi-functionality allows the same circuit to replace both the counter and separate memory circuits, reducing overall layout area while maintaining processing capability.
2Measurement precision
If separate memory circuits are used to store digital pixel signals for differential operations, then processing accuracy is maintained, but device complexity increases
Solution Approach 1:
The retention circuit within the asynchronous counter is merged with the counting function to create an integrated storage and processing unit. This eliminates the need for separate memory circuits while preserving the ability to accurately store and process digital pixel signals for differential operations.
Solution Approach 2:
The asynchronous counter performs self-storage of the first digital pixel signal through its retention circuit, eliminating the need for external memory circuits. The circuit serves its own storage needs internally, reducing overall device complexity while maintaining processing accuracy.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution reduces the memory circuits and layout area of the column reading system, leading to a smaller and more cost-effective CMOS image sensor design.
Implementation Method 1
a photodiode (a photoelectric conversion element) and a floating diffusion (FD) amplifier
Data Source
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AI summary
A solid-state imaging device (10, 10A), a method for driving a solid-state imaging device (10, 10A), and an electronic apparatus are provided that are capable of reducing memory circuits of a column reading system, so that the column reading system can achieve a reduced layout area and eventually a reduced size. A column reading circuit (40) includes an AD converting part (420) and a calculating part (430). The AD converting part 432 is configured to analog-to-digital convert a read-out reset signal VRST11 and a read-out signal VSIG11 of a pixel signal Pixout read to a vertical signal line LSGN into an n-bit digital pixel signal ADC[n] (RSTADC[n] and SIG ADC[n]). The calculating part (430) includes an n-bit asynchronous counter (431) including a retention circuit (460) with a control logic function, which is configured to obtain a difference between an n-bit read-out reset signal and an n-bit read-out signal produced by the AD conversion performed by the AD converting part 432.