Column SAR ADC Circuit for Faster Low-Power Image Sensing
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current column signal processing systems in imaging devices, particularly those using single-slope analog-to-digital converters, face challenges such as offset delays, interference between pixel columns, and high power consumption, limiting their speed and efficiency.
Innovation Solution
The implementation of a successive approximation register (SAR) analog-to-digital converter with a column amplifier unit and a capacitance unit that differentiates single-phase pixel signals using a reference voltage, allowing for higher speed and lower power consumption by employing a differential circuit configuration and switched capacitor sampling.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single-slope analog-to-digital converter is used in the column signal processing system, then the conversion process is simple, but the operation speed is slow and power consumption is high
Solution Approach 1:
The patent changes the fundamental operating parameters of the analog-to-digital converter from single-slope integration to successive approximation method. This parameter change enables parallel processing capabilities, significantly increasing operation speed while maintaining reasonable circuit complexity through the use of binary search algorithm in the conversion process.
Solution Approach 2:
The patent replaces the sequential mechanical integration process of single-slope converters with an electronic binary search-based successive approximation system. This substitution allows for faster convergence through logarithmic complexity rather than linear complexity, achieving higher speed operation.
2Device complexity
If a single-slope analog-to-digital converter is used in the column signal processing system, then the circuit structure is simple, but power consumption is high
Solution Approach 1:
The patent transforms the conversion methodology from continuous integration to discrete successive approximation, changing the temporal and operational parameters. This enables the system to complete conversions in fewer clock cycles, reducing the total energy consumption despite the increased circuit complexity of the successive approximation register and comparator.
3Ease of operation
If conventional column signal processing is used, then the processing method is straightforward, but interference between pixel columns occurs
Solution Approach 1:
The patent segments the column signal processing by introducing separate column amplifier units for different pixel columns, with each unit independently processing signals from its associated pixels. This segmentation prevents signal interference between columns while maintaining straightforward processing within each isolated column channel.
Solution Approach 2:
The patent introduces capacitance units as intermediary elements between the pixel array and the successive approximation register analog-to-digital converter. These capacitance units buffer and isolate signals, preventing interference propagation between different column processing channels while enabling efficient signal transfer to the converter.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enables faster and more efficient column signal processing with reduced power consumption, improving the overall performance of the imaging device by halving the number of analog-to-digital conversions and minimizing interference between signal lines.
Implementation Method 1
a pixel array unit including a plurality of pixels each including a photoelectric conversion element
Implementation Method 2
a capacitance unit that holds the pixel signal input from the column amplifier unit
Data Source
AI summary
There is provided a column signal processing system including a successive approximation register analog-to-digital converter and an imaging device. The imaging device includes a pixel array unit including a plurality of pixels each including a photoelectric conversion element, a column amplifier unit that obtains a difference between a reset component and a signal component input from each pixel of the pixel array unit via a signal line, and outputs the difference as a pixel signal, a capacitance unit that holds the pixel signal input from the column amplifier unit, and a successive approximation register analog-to-digital conversion unit that converts an analog pixel signal input from the capacitance unit into a digital signal, in which the capacitance unit differentiates a single-phase pixel signal input from the column amplifier unit using a reference voltage that defines a zero voltage of the pixel signal.