Column SAR ADC Imaging Circuit for Fast Low-Power Readout
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Solution Overview
Problem
Existing column signal processing systems in imaging apparatuses, particularly those using single-slope analog-to-digital converters, face challenges such as high power consumption, low speed, and interference issues due to through current or kickback during analog-to-digital conversion.
Innovation Solution
The implementation of a successive approximation register (SAR) analog-to-digital converter in the column signal processing system, which operates intermittently during the P-phase for reset components and stands by during the D-phase for signal components, or performs conversion processing during both phases, utilizing a column amplifier unit and a capacitance unit to enhance efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single-slope analog-to-digital converter is used in the column signal processing system, then the conversion process is simple, but the operating speed is low and power consumption is high
Solution Approach 1:
The patent changes the operational parameters of the analog-to-digital converter from continuous single-slope conversion to intermittent successive approximation conversion. By switching between active conversion phase and standby phase, the system achieves higher operating speeds and lower power consumption while maintaining conversion accuracy through the binary search mechanism of the SAR ADC.
2Device complexity
If a single-slope analog-to-digital converter is used in the column signal processing system, then the circuit structure is simple, but power consumption is high
Solution Approach 1:
The patent implements periodic action by operating the SAR ADC intermittently between active conversion phases and standby phases. During the active phase, the converter performs analog-to-digital conversion with full power; during the standby phase, power consumption is significantly reduced. This periodic operation pattern resolves the contradiction between circuit simplicity and power consumption efficiency.
3Measurement precision
If analog-to-digital conversion is performed continuously, then conversion accuracy is maintained, but interference from through current and kickback increases
Solution Approach 1:
The patent extracts the harmful through current and kickback interference from the continuous conversion process by implementing intermittent conversion with distinct active and standby phases. The standby phase allows the circuit to reset and eliminate accumulated interference, while the active phase performs accurate conversion. This separation resolves the contradiction between maintaining conversion accuracy and eliminating harmful interference.
Data Source
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AI summary
Provided is an imaging apparatus in which a column signal processing system includes a successive approximation register analog-to-digital converter capable of operating at higher speed and with lower power consumption. An electronic device of the present disclosure includes an imaging apparatus including a pixel array unit on which pixels including a photoelectric conversion element are arranged, a column amplifier unit that obtains a difference between a reset component and a signal component input from each of the pixels of the pixel array unit through a signal line and outputs the difference as a pixel signal, a capacitance unit that holds the pixel signal input from the column amplifier unit, and a successive approximation register analog-to-digital conversion unit that converts an analog signal input from the capacitance unit into a digital signal.