Column Semiconductor Structure for Normally-Off Low-Resistance Switching
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Solution Overview
Problem
Current semiconductor devices, such as transistors, face challenges in increasing the on/off current ratio while reducing on-resistance, particularly in achieving a normally-off state with minimal dislocation risk and improved pressure resistance.
Innovation Solution
A semiconductor device design featuring a column portion with a source, channel, and drift portion made of group III nitride semiconductors, where the channel has a lower impurity concentration than the source and drain, and a gate electrode surrounds the channel via an insulating layer, with the diameter of the column portion at the drift portion being larger than at the channel and source portions, facilitating complete depletion and reduced on-resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Shape
If the channel portion has a higher impurity concentration to reduce on-resistance, then the on-resistance decreases, but the on/off current ratio deteriorates
Solution Approach 1:
The patent applies local quality by creating different impurity concentration zones within the column portion: the channel portion has a lower impurity concentration (first impurity concentration) to ensure complete depletion and high on/off ratio, while the source and drain portions have higher impurity concentrations (second impurity concentration) to reduce contact resistance. This spatial variation in impurity concentration optimizes both the on/off current ratio and on-resistance simultaneously.
2Ease of manufacture
If the column portion has a uniform diameter to simplify manufacturing, then the manufacturing precision improves, but the pressure resistance deteriorates
Solution Approach 1:
The patent applies asymmetry by designing the column portion with a non-uniform diameter profile: the drift portion has a larger diameter than the channel portion. This asymmetric diameter distribution enhances pressure resistance in the drift region where high electric fields occur, while maintaining a smaller channel diameter for effective gate control and complete depletion, thereby improving both strength and manufacturability.
3Reliability
If the channel portion is completely depleted to increase on/off current ratio, then the on/off current ratio improves, but the on-resistance increases
Solution Approach 1:
The patent applies parameter changes by optimizing the impurity concentration in the channel portion to a specific low level that enables complete depletion under zero gate bias (normally-off state), while simultaneously optimizing the column diameter and doping profile to minimize the resistance in the depleted state. This allows achieving both high on/off ratio and low on-resistance through coordinated parameter optimization.
Data Source
AI summary
A semiconductor device includes a column portion including a source portion and a drain portion constituted by semiconductors having the same conductivity type, a channel portion provided between the source portion and the drain portion and constituted by a semiconductor having a lower impurity concentration than those of the source portion and the drain portion, and a drift portion provided between the channel portion and the drain portion and constituted by a semiconductor having the same conductivity type as that of the drain portion; and a gate electrode provided at a sidewall of the column portion at the channel portion via an insulating portion and configured to control the current of the channel portion. The diameter of the column portion at the drift portion is larger than the diameter of the column portion at the channel portion and the diameter of the column portion at the source portion.