Column-Sharing ADC Architecture for High-Frame-Rate Image Sensors

Solution Overview

Problem

Existing image sensor technologies face challenges in minimizing sensor size, power consumption, and area usage while maintaining high frame rates and image quality, particularly in endoscopy applications where small pixel sizes and multiple readout channels are required, leading to increased complexity and area occupation by analog-to-digital converters (ADCs).

Innovation Solution

The proposed solution involves an analogue to digital converter architecture that shares N columns, using read-out capacitors and a single operational amplifier to perform correlated double sampling in the analogue domain, allowing parallel readout of reset values and sequential conversion of signal values, reducing the number of ADC conversions and optimizing area and power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If multiple ADCs are used to increase frame rate, then productivity is improved, but device complexity and area increase

Engineering Contradiction:

Improveframe rateVSAvoidADC quantity

Core Design Contradiction:

ProductivityVSDevice complexity

Solution Approach 1:

Multiple pixel columns share a single ADC by time-multiplexing the readout process. The ADC is sequentially connected to different column buffers through switching circuitry, allowing one ADC to service multiple columns that would traditionally require separate ADCs. This merging approach maintains high frame rates while reducing the total number of ADC components needed.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The ADC operates in periodic cycles, alternating between converting signals from different pixel columns in a time-multiplexed fashion. During each cycle, the ADC is connected to one column buffer at a time through controlled switching, creating a periodic conversion pattern that achieves parallel throughput from multiple columns using a single converter.

Inventive Principle:

Principle #19Periodic action

2Productivity

If multiple ADCs are used to increase frame rate, then productivity is improved, but power consumption increases

Engineering Contradiction:

Improveframe rateVSAvoidpower consumption

Core Design Contradiction:

ProductivityVSUse of energy by moving object

Solution Approach 1:

Multiple pixel columns share a single ADC by time-multiplexing the readout process. The ADC is sequentially connected to different column buffers through switching circuitry, allowing one ADC to service multiple columns that would traditionally require separate ADCs. This merging approach maintains high frame rates while reducing the total number of ADC components needed.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

A single ADC is designed to perform multiple functions by sequentially converting signals from different pixel columns. The ADC serves as a universal converter that can handle any column buffer input through time-multiplexed switching, eliminating the need for dedicated ADCs for each column and thereby reducing overall power consumption.

Inventive Principle:

Principle #6Universality (Multi-functionality)

3Productivity

If multiple ADCs are used to increase frame rate, then productivity is improved, but area occupation increases

Engineering Contradiction:

Improveframe rateVSAvoidADC area

Core Design Contradiction:

ProductivityVSArea of stationary object

Solution Approach 1:

Multiple pixel columns share a single ADC by time-multiplexing the readout process. The ADC is sequentially connected to different column buffers through switching circuitry, allowing one ADC to service multiple columns that would traditionally require separate ADCs. This merging approach maintains high frame rates while reducing the total number of ADC components needed.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The patent transitions from a spatial parallel architecture (multiple ADCs operating simultaneously for different columns) to a temporal parallel architecture (single ADC operating sequentially through time-multiplexed switching). This dimensional change from space to time allows maintaining high throughput while dramatically reducing the physical area occupied by ADC components.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS12069389B2Column sharing ADC for image sensors and method of operation

Publication Date: 2024.08.20 TELEDYNE INNOVACIONES MICROELECTRONICSAS SLU

AI summary

An analogue to digital converter is provided for digital imaging devices, in which a pixel column is sampled by a respective capacitor.In a reset phase of operation, each pixel in the row under consideration is reset, and an operational amplifier operating in a voltage follower mode is coupled to all the sampling capacitors in parallel to obtain the reset values of the pixels sensors of that row, and the in an imaging phase of operation, the inverting input of the operational amplifier operating in a comparator mode is coupled to each capacitor in turn after activating the respective pixel sensor, while exposing the non inverting signal to an analog ramp reference voltage so that the timing of the toggling of the operational amplifier reflects the value of the pixel under consideration, corrected for the reset value.