Columnar Hetero-Semiconductor Regions in Power MOSFETs
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Solution Overview
Problem
The high cost and complexity of manufacturing superjunction (SJ) power MOSFETs due to the need for multistage epitaxial growth and impurity introduction processes to form p-type columnar structures on n-type semiconductor substrates, leading to increased costs and device size.
Innovation Solution
A semiconductor device with columnar hetero-semiconductor regions made of p+ type polysilicon, extending between the main surfaces of a semiconductor substrate, which reduces the need for multistage epitaxial growth and impurity implantation, allowing for a more efficient and cost-effective manufacturing process and smaller device size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multistage epitaxial growth and impurity introduction processes are used to form p-type columnar structures on n-type semiconductor substrates, then the device achieves low on-resistance and high breakdown voltage, but the manufacturing cost and device complexity increase significantly
Solution Approach 1:
The patent changes the material parameter from conventional semiconductor to hetero-semiconductor (different band gap material), which fundamentally alters the electrical characteristics and enables achieving high breakdown voltage and low on-resistance without complex multistage epitaxial growth processes. This material parameter change simplifies the manufacturing process while maintaining or improving device performance.
Solution Approach 2:
The patent employs composite hetero-semiconductor structures where regions of different semiconductor materials with different band gaps are combined. This composite approach allows the device to achieve superior electrical characteristics (low on-resistance and high breakdown voltage) while simplifying the manufacturing process compared to conventional single-material approaches requiring multiple processing stages.
2Reliability
If multistage epitaxial growth and impurity introduction processes are used to form p-type columnar structures, then the device achieves low on-resistance, but the manufacturing cost increases
Solution Approach 1:
By changing the material parameter to hetero-semiconductor with different band gap, the patent achieves low on-resistance through material properties rather than through complex processing. This single-material approach with modified parameters eliminates the need for expensive multistage epitaxial growth and repeated impurity introduction, significantly reducing manufacturing cost while maintaining low on-resistance performance.
3Reliability
If conventional SJ structure with p and n impurity regions in sandwich arrangement is used, then the depletion layer is extended horizontally, but the device size and manufacturing complexity increase
Solution Approach 1:
The patent changes the material composition parameter to hetero-semiconductor, which enables vertical depletion layer extension rather than horizontal extension. This parameter change allows achieving complete drift region depletion with a more compact device structure, reducing device size while maintaining or improving the depletion layer extension effect.
Data Source
AI summary
A semiconductor device of the invention includes a first conductive type semiconductor base substrate; and a switching mechanism which is formed on a first main surface of the semiconductor base substrate and switches ON/OFF of a current. In the semiconductor base substrate, a plurality of columnar hetero-semiconductor regions are formed at spaced intervals within the semiconductor substrate, and the hetero-semiconductor regions are made of a semiconductor material having a different band gap from the semiconductor substrate and extend between the first main surface and a second main surface opposite to the first main surface.