Comb-like Routing Structure for 3D Memory Metal Line Loading

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Solution Overview

Problem

Three-dimensional NAND flash memory devices face challenges in reducing metal line density to minimize cross-talk and enhance program speed due to the dense packing of bit lines and other metal routing lines on the same plane.

Innovation Solution

The implementation of a staggered fabrication method for metal lines, where a first set of conductive lines is vertically positioned at one end and a second set of conductive lines is positioned at the opposite end of the structures, reducing their density on the same plane and creating a comb-like routing structure.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If metal lines are densely packed on the same plane to increase integration, then device area is reduced, but cross-talk between lines increases and program speed decreases

Engineering Contradiction:
Improvedevice areaVSAvoidcross-talk between metal lines
Core Design Contradiction:
Area of stationary objectVSObject-affected harmful factors

Solution Approach 1:

The patent applies dimensionality change by transitioning from a two-dimensional planar arrangement of metal lines to a three-dimensional staggered configuration. Bit lines are positioned at different vertical levels (first bit lines at a lower level, second bit lines at a higher level), creating a comb-like structure that reduces in-plane density while maintaining electrical connectivity. This vertical separation effectively reduces cross-talk between adjacent bit lines without increasing the footprint area of the device.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Area of stationary object

If metal lines are densely packed on the same plane, then device area is reduced, but program speed decreases due to increased loading

Engineering Contradiction:
Improvedevice areaVSAvoidprogram speed
Core Design Contradiction:
Area of stationary objectVSSpeed

Solution Approach 1:

The staggered fabrication method positions bit lines at different vertical levels, creating a comb-like routing structure. This dimensional separation reduces the loading on individual metal lines by distributing the electrical burden across multiple levels, thereby enhancing program speed while maintaining high integration density in the horizontal plane.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Ease of manufacture

If bit lines are laid perpendicular to word lines in a planar configuration, then routing is simplified, but metal line density increases

Engineering Contradiction:
Improverouting simplicityVSAvoidmetal line density
Core Design Contradiction:
Ease of manufactureVSQuantity of substance

Solution Approach 1:

The patent maintains the perpendicular routing arrangement between bit lines and word lines for manufacturing simplicity, but introduces a vertical dimension by staggering bit lines at different levels. This creates a comb-like structure where first bit lines are positioned at a lower vertical level and second bit lines at a higher vertical level, reducing in-plane metal line density while preserving the ease of perpendicular routing implementation.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS11443807B2Memory device using comb-like routing structure for reduced metal line loading
Publication Date: 2022.09.13 YANGTZE MEMORY TECH CO LTD
  • US11443807B2 patent drawing
  • US11443807B2 patent drawing
  • US11443807B2 patent drawing

AI summary

Embodiments of three-dimensional memory device architectures and fabrication methods therefor are disclosed. In an example, the memory device includes a substrate and one or more peripheral devices on the substrate. The memory device also includes one or more interconnect layers and a semiconductor layer disposed over the one or more interconnect layers. A layer stack having alternating conductor and insulator layers is disposed above the semiconductor layer. A plurality of structures extend vertically through the layer stack. A first set of conductive lines are electrically coupled with a first set of the plurality of structures and a second set of conductive lines are electrically coupled with a second set of the plurality of structures different from the first set. The first and second sets of conductive lines are vertically distanced from opposite ends of the plurality of structures.