Combination Storage and Processing Device for Computing Speed
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Solution Overview
Problem
Current computing architectures face limitations in increasing computing speed due to the need for multiple processors and increased clock cycles, which lead to size, power, and heat dissipation issues, as well as inefficiencies in data transfer between RAM and CPU, hindering overall performance.
Innovation Solution
A combination storage and processing device that integrates computation units and data storage elements on a single integrated circuit, allowing for single-instruction multiple-data operations to be performed directly on data stored in RAM without transferring it to the CPU, thereby reducing data movement through the CPU/RAM data bus and increasing computing speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the number of processors in the CPU is increased to increase computing speed, then computing speed is improved, but device size, power consumption, and heat dissipation increase
Solution Approach 1:
The patent merges storage and processing functions into a single integrated device. The combination storage and processing device integrates RAM storage cells with computation units that can directly perform operations on stored data, eliminating the need for separate CPU processors to handle basic operations. This consolidation increases computing speed while reducing device size by combining previously separate components.
2Productivity
If the number of processors in the CPU is increased to increase computing speed, then computing speed is improved, but power consumption increases
Solution Approach 1:
The patent merges storage and processing functions into a single integrated device. The combination storage and processing device integrates RAM storage cells with computation units that can directly perform operations on stored data, eliminating the need for separate CPU processors to handle basic operations. This consolidation increases computing speed while reducing device size by combining previously separate components.
3Ease of operation
If data is transferred between RAM and CPU through the data bus to enable processing, then processing can be performed, but computing speed is reduced due to data transfer time
Solution Approach 1:
The patent merges storage and processing functions into a single integrated device. The combination storage and processing device integrates RAM storage cells with computation units that can directly perform operations on stored data, eliminating the need for separate CPU processors to handle basic operations. This consolidation increases computing speed while reducing device size by combining previously separate components.
Solution Approach 2:
The patent introduces computation units as intermediary elements directly integrated with the storage cells. These computation units act as intermediaries that can process data in-place within the storage array, eliminating the need for data to travel through the external data bus to and from the CPU. This intermediary processing capability significantly reduces data transfer time and increases computing speed.
Data Source
AI summary
A combination storage and processing device is disclosed. A large scale integrated circuit which incorporates both random access memory storage for individual data elements and circuits which process data elements according to a fixed set of instructions is disclosed. When directed by controlling software or hardware, a plurality of the individual data elements stored in the random access memory storage are pushed through the circuits which perform fixed operations upon the data elements and return them to random access memory storage. This allows operations to be performed on the plurality of data elements without sending them through a data bus to the central processing unit of a general purpose computing device, increasing efficiency and overall computing speed.