Combinatorial ALD and PVD for High-k Gate Stack Screening
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Solution Overview
Problem
Current high productivity combinatorial (HPC) processing techniques have not been successfully adapted to evaluate materials and process conditions for optimal high-k gate stack characteristics, particularly for effective work function, in semiconductor devices.
Innovation Solution
The implementation of combinatorial atomic layer deposition (ALD) and physical vapor deposition (PVD) processes, along with additional support processes like cleaning and lithography patterning, to deposit multiple layers in site-isolated regions, allowing for the screening of layer properties and the development of ALD processes that achieve desired characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If traditional separate substrate testing is used for different materials and process conditions, then each material/condition can be tested individually, but the number of substrates required increases significantly and development costs increase
Solution Approach 1:
The substrate is divided into multiple site-isolated regions, each receiving different processing conditions or materials. This segmentation allows parallel testing of multiple variables on a single substrate, reducing the total number of substrates needed while maintaining evaluation accuracy for each condition
Solution Approach 2:
Multiple testing functions are merged onto a single substrate by creating site-isolated regions that can be processed independently. This combining approach allows simultaneous evaluation of different materials, process conditions, and sequences on one substrate, dramatically reducing substrate consumption
2Adaptability or versatility
If multiple substrates are used to test different process sequences and integrations, then comprehensive evaluation is possible, but processing time and development costs increase
Solution Approach 1:
The substrate surface is segmented into multiple site-isolated regions that can independently accommodate different process sequences and integration flows. This enables parallel processing and evaluation of multiple process variations simultaneously, reducing development time while maintaining comprehensive evaluation capability
Solution Approach 2:
The evaluation approach transitions from testing multiple substrates sequentially to testing multiple regions on a single substrate in parallel. This dimensional change from substrate-level to region-level testing enables simultaneous evaluation of multiple process sequences, dramatically accelerating development timelines
3Ease of manufacture
If conventional processing techniques are used for high-k gate dielectrics, then standard processes can be applied, but the sensitivity of high-k dielectrics to process conditions requires precise control and sequencing
Solution Approach 1:
Different site-isolated regions on the substrate receive different processing conditions, materials, and sequences tailored to specific evaluation needs. This local quality approach allows precise control of process variables in each region while maintaining overall process simplicity through standardized processing steps
Solution Approach 2:
The invention systematically varies processing parameters such as material composition, deposition conditions, and process sequencing across different site-isolated regions. This parameter change strategy enables precise evaluation of high-k dielectric sensitivity to process conditions while maintaining manageable process complexity through controlled variation
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the efficient evaluation and optimization of materials and processes for high-k device performance, reducing the need for multiple substrates and lowering development costs by allowing for the screening of various materials and conditions on a single monolithic substrate.
Implementation Method 1
combinatorial atomic layer deposition (ALD) and physical vapor deposition (PVD) processes
Implementation Method 2
combinatorial atomic layer deposition (ALD) and physical vapor deposition (PVD) processes
Data Source
AI summary
A combination of deposition processes can be used to evaluate layer properties using a combinatorial workflow. The processes can include a base ALD process and another process, such as a PVD process. The high productivity combinatorial technique can provide an evaluation of the material properties for given ALD base layer and PVD additional elements. An ALD process can then be developed to provide the desired layers, replacing the ALD and PVD combination.