Combinatorial Logic Circuit for High-Frequency IC Testing

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Solution Overview

Problem

High-frequency semiconductor integrated circuits (ICs) require high-frequency test equipment for accurate testing, which is expensive and not feasible for all generations due to the dependency on the IC's operation frequency.

Innovation Solution

A test system with a combinatorial logic circuit and main circuit, utilizing two storage modules with different operation clocks, where the first storage module operates at a lower frequency and outputs factors to a second storage module operating at a higher frequency, allowing the main circuit to generate test results independently of the IC's frequency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If high-frequency test equipment is used to test high-frequency ICs, then measurement precision is improved, but device cost increases

Engineering Contradiction:
Improvetesting accuracyVSAvoidequipment cost
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent segments the testing system into two parts: a low-frequency test equipment (external device) and a high-frequency combinatorial logic circuit (integrated into the measured device). This segmentation allows the expensive high-frequency requirements to be localized only where needed (in the logic circuit) while the bulk of the testing infrastructure can operate at lower, more economical frequencies.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a frequency conversion mechanism as an intermediary between the low-frequency test equipment and the high-frequency measurement requirements. The combinatorial logic circuit acts as a mediator that receives low-frequency test signals, internally processes them at high frequency, and produces accurate test results, thereby bridging the frequency gap without requiring the external equipment to operate at high frequency.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Measurement precision

If test equipment operates at the same frequency as the IC, then measurement precision is improved, but operational cost increases

Engineering Contradiction:
Improvetesting accuracyVSAvoidoperational cost
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The patent separates the frequency requirements between the test equipment and the measurement circuit. The test equipment operates at a lower frequency (first operating frequency) while the combinatorial logic circuit operates at the higher frequency needed for accurate high-frequency IC testing. This segmentation reduces the operational energy burden on the external equipment while maintaining measurement precision.

Inventive Principle:
Principle #1Segmentation

3Measurement precision

If high-frequency test equipment is used, then measurement precision is improved, but ease of manufacture deteriorates

Engineering Contradiction:
Improvetesting accuracyVSAvoidequipment accessibility
Core Design Contradiction:
Measurement precisionVSEase of manufacture

Solution Approach 1:

The patent integrates the high-frequency combinatorial logic circuit directly into the measured device or as a separate module that interfaces with standard low-frequency equipment. This segmentation allows manufacturers to use widely available, low-frequency test equipment for most testing needs, while only requiring high-frequency components where specifically needed, thereby improving ease of manufacture and equipment accessibility.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS8423851B2Measured device and test system utilizing the same
Publication Date: 2013.04.16 NAN YA TECH
  • US8423851B2 patent drawing
  • US8423851B2 patent drawing
  • US8423851B2 patent drawing

AI summary

A measured device coupled to test equipment providing at least two test factors and receiving a test result is disclosed. The measured device includes a combinatorial logic circuit and a main circuit. The combinatorial logic circuit includes a first storage module and a second storage module. The first storage module stores the test factors according to a first operation clock. The second storage module stores and outputs at least two output factors according to a second operation clock. The frequency of the second operation clock is higher than the frequency of the first operation clock. When the test factors are stored in the first storage module, the test factors stored in the first storage module are served as the output factors and the output factors are output and stored in the second storage module. The main circuit generates the test result according to the output factors output by the second storage module. The test equipment obtains information as to whether the main circuit is normal according to the test result.