Combined Feedforward and Fixed Time Delay Circuit
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Solution Overview
Problem
Existing delay circuits in switching DC-DC converters lack precision and adjustability, which can lead to inefficiencies and safety issues in the operation of high-side and low-side switches.
Innovation Solution
A delay circuit comprising a first timer circuit with a transconductance amplifier and a first capacitor, and a second timer circuit with current generators and a second capacitor, which modifies charging currents based on input signals to achieve precise delay characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a basic RC network is used for delay, then the circuit complexity is low, but the delay precision is insufficient
Solution Approach 1:
The delay circuit is divided into two independent timer circuits (first timer circuit with transconductance amplifier and second timer circuit with current generators), each responsible for specific delay functions. This segmentation allows precise control of delay parameters while maintaining modular circuit structure, resolving the contradiction between precision and complexity.
Solution Approach 2:
The circuit employs adjustable transconductance amplifiers and configurable current generators that can dynamically modify their operating parameters. This dynamic capability enables precise delay adjustment without requiring complex fixed-precision circuitry, achieving high precision with manageable complexity.
2Measurement precision
If dedicated delay ICs or digital delay elements are used, then the delay precision is improved, but the device complexity increases
Solution Approach 1:
The patent combines multiple delay functions into a unified analog timer circuit architecture where the first and second timer circuits work together. This merging achieves precise delay control through coordinated analog timing mechanisms rather than requiring separate dedicated delay ICs, reducing overall system complexity while maintaining precision.
Solution Approach 2:
The circuit uses adjustable transconductance parameters and current generator settings to precisely control delay timing. By changing operational parameters (transconductance values, current levels) rather than restructuring the circuit, precise delay is achieved without increasing structural complexity.
3Adaptability or versatility
If the delay circuit uses fixed timing, then the circuit complexity is low, but the adaptability to different converter requirements is reduced
Solution Approach 1:
The timer circuits incorporate adjustable transconductance amplifiers and configurable current generators that can be programmed or tuned to provide different delay values. This dynamic adjustability allows the same circuit structure to adapt to various converter requirements without becoming overly complex, as the adjustment is achieved through parameter control rather than structural reconfiguration.
Solution Approach 2:
The delay circuit is designed with universal timer blocks that can serve multiple delay requirements within the converter system. The first and second timer circuits can be configured for different delay functions (e.g., dead-time delay, synchronization delay) using the same architectural approach, providing versatility without proportionally increasing complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed delay circuit ensures precise and adjustable timing delays, enhancing the operational efficiency and safety of switching DC-DC converters by accurately coordinating the high-side and low-side switches.
Implementation Method 1
a first timer circuit having a transconductance amplifier and a first capacitor
Implementation Method 2
a second timer circuit comprising a first current generator, a second current generator, and a second capacitor
Data Source
AI summary
According to an embodiment, a delay circuit for a control logic in a converter is provided. The delay circuit includes a first timer circuit having a transconductance amplifier and a first capacitor. The delay circuit includes a second timer circuit coupled to the first timer circuit. The second timer circuit includes a first current generator, a second current generator, and a second capacitor. The second timer circuit is configured to receive an output signal from the first timer circuit to modify a charging current provided by the second current generator or a sum of the first current generator and the second current generator to charge the second capacitor in the second timer circuit.