Combined Isolation Layer for Semiconductor Stress Relief
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Solution Overview
Problem
Conventional semiconductor device fabrication methods face challenges in preventing stress concentration and improving inter-well breakdown voltage and leakage current characteristics due to the differences in isolation layer depths and dimensions between high-voltage and low-voltage transistors, which also lead to integration density limitations and potential electrical shorts.
Innovation Solution
A semiconductor device with a combination of shallow trench isolation (STI) and deep trench isolation (DTI) or medium trench isolation (MTI) isolation layers, where the third isolation layer in the boundary region is formed by combining the first and second isolation layers, with different depths and impurity doping concentrations, to alleviate stress concentration and enhance breakdown voltage and leakage current characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If separate isolation layers are formed for high-voltage and low-voltage regions, then electrical isolation is achieved, but stress concentration occurs in the boundary region
Solution Approach 1:
The patent merges the first isolation layer (for low-voltage region) and the second isolation layer (for high-voltage region) into a single continuous isolation layer that extends across both regions and the boundary region. This unified structure eliminates the interface between separate isolation layers, thereby preventing stress concentration at the boundary while maintaining electrical isolation between high-voltage and low-voltage transistors.
2Stress or pressure
If the gap between isolation layers in the boundary region is increased, then stress concentration is reduced, but integration density decreases
Solution Approach 1:
The patent combines the isolation layers into a continuous structure that eliminates the need for gaps between them. The single isolation layer spans across the boundary region, providing mechanical stress relief without requiring additional spacing, thereby maintaining high integration density while reducing stress concentration.
3Reliability
If deeper trenches are formed for high-voltage isolation, then breakdown voltage is improved, but manufacturing complexity increases
Solution Approach 1:
The patent segments the trench formation process into two stages: first forming a shallow trench to a uniform depth across the entire chip, then selectively deepening the trench only in the high-voltage region using a sacrificial pattern. This segmentation allows the manufacturing process to handle the complexity of varying trench depths by breaking it down into manageable steps, achieving high breakdown voltage without excessive manufacturing complexity.
4Reliability
If different trench depths are used for high-voltage and low-voltage regions, then electrical characteristics are improved, but process complexity increases
Solution Approach 1:
The patent divides the trench formation into sequential steps: a first etching process creates a shallow trench of uniform depth, then a second etching process selectively deepens the trench in the high-voltage region. The sacrificial pattern enables this selective deepening without requiring complex simultaneous etching, thereby achieving different trench depths for optimized electrical characteristics while keeping the process relatively simple.
Solution Approach 2:
The patent performs preliminary action by first forming the shallow trench across the entire chip before selectively deepening it in the high-voltage region. This preliminary uniform trench formation simplifies the subsequent selective deepening process, as the base structure is already in place, reducing the overall process complexity while achieving the required different depths.
Data Source
AI summary
A semiconductor device includes: a first well and a second well formed in a substrate and having a different impurity doping concentration; a first isolation layer and a second isolation layer formed in the first well and the second well, respectively, and having a different depth; and a third isolation layer formed in a boundary region in which the first well and the second well are in contact with each other, and having a combination type of the first isolation layer and the second isolation layer.