Combined Metrology Mark for Reticle and Wafer Overlay Alignment
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Solution Overview
Problem
Current semiconductor manufacturing processes face challenges in accurately measuring overlay alignment between patterned layers on wafers due to separate data processing of reticle misregistration and wafer overlay marks, leading to potential errors in process control and engineering analysis.
Innovation Solution
A combined metrology mark system that includes both reticle misregistration and wafer overlay marks, allowing for direct comparison and analysis, which reduces errors by eliminating the need for spatial extrapolation and interpolation, and provides more accurate results by correlating mask and wafer data.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If separate data processing of reticle misregistration and wafer overlay marks is used, then the measurement process is simpler, but the measurement precision and reliability of overlay alignment deteriorates
Solution Approach 1:
The patent combines reticle misregistration marks and wafer overlay marks into a single integrated metrology target structure. This merging allows simultaneous measurement of both reticle alignment and wafer overlay in one process, eliminating the need for separate data processing while improving measurement precision through direct correlation of mask and wafer data at the same spatial location.
2Reliability
If separate measurement of reticle and wafer alignment is performed, then the measurement process is easier to implement, but the reliability of process control deteriorates due to potential errors
Solution Approach 1:
By integrating both reticle and wafer marks into a single combined metrology target, the system enables simultaneous measurement and direct comparison of alignment data. This eliminates errors associated with separate measurements and spatial extrapolation, improving reliability while maintaining ease of operation through a unified measurement process.
Solution Approach 2:
The combined metrology target acts as an intermediary structure that bridges reticle and wafer measurement systems. It provides a common reference framework that allows direct correlation of alignment data without requiring complex spatial transformations or extrapolation, thereby improving reliability while simplifying the measurement implementation.
3Measurement precision
If spatial extrapolation and interpolation are used to correlate reticle and wafer data, then the measurement coverage is broader, but the measurement precision deteriorates due to potential errors
Solution Approach 1:
The combined metrology target integrates reticle and wafer marks at the same physical location, enabling direct measurement correlation without spatial extrapolation or interpolation. This merging approach maintains high measurement precision by eliminating mathematical transformation errors while still providing comprehensive alignment assessment through the integrated target design.
Data Source
AI summary
A combined metrology mark, a system, and a method for calculating alignment on a semiconductor circuit are disclosed. The combined metrology mark may include a mask misregistration structure and a wafer overlay mark structure.