Command Bus Drift Compensation Using Data Bus Feedback
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Solution Overview
Problem
Unidirectional command buses in memory systems experience phase drift due to temperature changes, leading to misalignment between information and strobe signals, which is not compensated for in existing architectures, and adding a separate feedback mechanism would require extra pins and be slower than the channel.
Innovation Solution
Implementing a ring oscillator in the memory device to measure drift and provide feedback over the existing bidirectional data bus, allowing the host to adjust command bus settings to compensate for phase drift without additional pins.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If an unmatched memory IO architecture is used to increase transfer speed, then data transfer speed is improved, but phase alignment between information signal and strobe signal deteriorates due to temperature-induced noise
Solution Approach 1:
The patent implements a feedback mechanism where the receiving device measures phase drift between the information signal and strobe signal, quantifies it as drift terms, and sends these drift terms back to the transmitting device. The transmitting device then uses this feedback to adjust its transmit settings and compensate for the phase drift, thereby maintaining signal alignment accuracy while operating in an unmatched architecture that enables high-speed data transfer.
2Reliability
If a separate sideband bus is added to provide feedback for drift compensation, then phase drift compensation capability is improved, but device complexity and pin count increase
Solution Approach 1:
The patent makes the existing bidirectional data bus serve multiple functions: it is used for both high-speed data transfer and for transmitting drift compensation feedback from the receiving device to the transmitting device. By reusing the data bus for dual purposes, the patent eliminates the need for a separate sideband bus, thereby maintaining drift compensation capability while avoiding increased device complexity and additional pins.
3Reliability
If a separate sideband bus is added for feedback, then drift compensation is enabled, but feedback speed deteriorates compared to the main channel
Solution Approach 1:
The patent utilizes the existing bidirectional data bus, which already operates at high speed for data transfer, to also carry drift compensation feedback. This approach ensures that feedback transmission occurs at the same high speed as the main data channel, avoiding the speed deterioration that would result from introducing a slower separate sideband bus.
Data Source
AI summary
A system has an unmatched communication architecture for a unidirectional command bus and compensates for drift on the command bus based on data provided on a bidirectional data bus. The memory device has an oscillator to measure drift or an amount of delay for the command bus over a time interval. The memory device can return a value over the data bus to the memory controller based on the delay measured with the oscillator. Based on receiving the value, the memory controller can adjust configuration settings for communication on the command bus.