Command Bus Training Using Error Detection for LPDDR Memory
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Solution Overview
Problem
Existing command bus training methods for LPDDR4 and LPDDR5 memory devices are slow and limited in quality due to the need for extensive firmware coordination, which fails to capture multiple sampling opportunities, leading to inefficiencies in training command buses.
Innovation Solution
Implementing error detection circuitry within memory controllers to facilitate command bus training by using parity checks or cyclic redundancy checks for LPDDR4/LPDDR5 devices, reducing the need for firmware coordination and enhancing training speed and quality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If firmware coordination is used for command bus training, then training can be performed, but training speed is slow and quality is limited
Solution Approach 1:
The memory device performs self-training by autonomously sampling command bus signals at multiple points and determining optimal sampling parameters without external firmware coordination. The device uses internal circuitry to generate training patterns, sample signals, and adjust sampling points, enabling the system to train itself rapidly without host controller intervention for each sampling operation.
Solution Approach 2:
The command bus training operates continuously by rapidly iterating through multiple sampling points and patterns without interruption. The memory device continuously samples the command bus at different timing points and voltage levels, accumulating data to determine optimal sampling parameters in an uninterrupted sequence, maximizing training throughput and speed.
2Reliability
If extensive firmware coordination is used for command bus training, then training can be performed, but training efficiency is reduced
Solution Approach 1:
The memory device autonomously performs the complete training sequence including pattern generation, signal sampling, error detection, and parameter optimization without requiring firmware to coordinate each step. This self-service approach eliminates firmware bottlenecks while maintaining high training accuracy through multiple internal sampling points and verification mechanisms.
Solution Approach 2:
The memory device prepares training patterns and sampling sequences in advance, pre-configuring internal registers and test patterns before actual sampling begins. This preliminary preparation allows the training to proceed rapidly without real-time firmware intervention, improving efficiency while ensuring accurate sampling through pre-validated test sequences.
3Measurement precision
If traditional command bus training methods are used, then signaling standards can be met, but multiple sampling opportunities are not captured
Solution Approach 1:
The training process is segmented into multiple independent sampling operations at different time points, voltage levels, and signal edges. Instead of a single comprehensive sampling event, the device performs numerous discrete samples across the signal eye diagram, capturing detailed characteristics that improve accuracy while the rapid segmentation enables parallel processing and faster overall training completion.
Solution Approach 2:
The memory device performs periodic sampling at regular intervals across multiple command bus cycles, systematically varying sampling points to map the signal eye. This periodic sampling approach captures comprehensive signal characteristics through repeated measurements while maintaining high speed through rhythmic, predictable sampling patterns that optimize internal buffer utilization and processing efficiency.
Data Source
AI summary
Techniques for command bus training to a memory device includes triggering a memory device to enter a first or a second command bus training mode, outputting a command/address (CA) pattern via a command bus and compressing a sampled CA pattern returned from the memory device based on whether the memory device was triggered to be in the first or the second command bus training mode.