Semiconductor Command Pulse Generation Circuit Blocking

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Solution Overview

Problem

Semiconductor devices face challenges in stably generating command pulses for internal operations, often resulting in unintended command pulse generation due to the lack of effective blocking mechanisms during clock cycles.

Innovation Solution

The semiconductor device incorporates first and second command pulse generation circuits, along with blocking signal generation circuits, to generate command pulses based on internal command addresses and clock signals, with blocking signals activated during specific clock cycles to prevent unintended pulse generation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If command pulse generation is enabled during clock cycles, then command pulses can be generated for internal operations, but unintended command pulse generation may occur

Engineering Contradiction:

Improvecommand pulse generation capabilityVSAvoidcommand pulse stability

Core Design Contradiction:

ProductivityVSReliability

Solution Approach 1:

The patent applies preliminary action by generating blocking signals in advance based on the command address before command pulse generation occurs. The blocking signal generation circuit receives the command address and generates appropriate blocking signals that are then used to control the command pulse generation circuits, preventing unintended pulse generation before it can occur.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent uses blocking signals as intermediaries between the command address and the command pulse generation circuits. These blocking signals act as mediators that control whether command pulses are generated or suppressed, allowing reliable control of pulse generation without directly modifying the command address or pulse generation logic.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Reliability

If blocking signals are used to prevent unintended command pulse generation, then command pulse stability improves, but command pulse generation may be unintentionally blocked

Engineering Contradiction:

Improvecommand pulse stabilityVSAvoidcommand pulse generation efficiency

Core Design Contradiction:

ReliabilityVSProductivity

Solution Approach 1:

The patent applies local quality by generating different blocking signals for different command addresses. The blocking signal generation circuit selectively activates specific blocking signals based on the command address being decoded, ensuring that only the necessary command pulse generations are blocked while others proceed normally, thus avoiding unintentional blocking.

Inventive Principle:

Principle #3Local quality

Solution Approach 2:

The patent uses dynamic blocking signals that are activated or deactivated based on the specific command address being processed. The blocking signal generation circuit dynamically adjusts which blocking signals are active, allowing the system to adaptively control command pulse generation on a per-command basis rather than using a static blocking mechanism.

Inventive Principle:

Principle #15Dynamics

Data Source

PatentUS10796740B2Method for generating command pulses and semiconductor device configured to perform the method

Publication Date: 2020.10.06 SK HYNIX INC

AI summary

A semiconductor device includes a first command pulse generation circuit configured to generate a first command pulse from an internal command address based on a first blocking signal; and a second command pulse generation circuit configured to generate a second command pulse from the internal command address based on a second blocking signal.