Command Queue Management for Memory Storage Stability

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Solution Overview

Problem

The limited command buffer space in memory storage devices leads to issues in the subsequent operation of memory storage devices, as they cannot store and continuously execute commands effectively.

Innovation Solution

A command management method that involves obtaining commands from a host system, storing them in a buffer region, and grouping commands meeting specific pairing conditions into a command queue for continuous execution, ensuring operational stability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If commands are stored in a limited command buffer space, then the memory storage device can temporarily hold commands, but it cannot store commands that need to be continuously executed

Engineering Contradiction:
Improvecommand buffer spaceVSAvoidoperational stability
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The command buffer space is segmented into a first buffer region for storing commands and a second buffer region for storing data. This segmentation allows commands to be stored in the first buffer region and executed continuously, while the second buffer region handles data storage, thereby resolving the limitation of limited command buffer space and improving operational stability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a command queue mechanism that operates in a different dimension from the traditional command buffer. Commands are organized in a queue structure that allows continuous execution without being constrained by the limited buffer space, effectively adding a new dimension to command management and improving reliability.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Adaptability or versatility

If the memory storage device uses host memory as register, then it can actively access data, but the buffer space for temporarily storing commands remains limited

Engineering Contradiction:
Improveactive data access capabilityVSAvoidcommand buffer space
Core Design Contradiction:
Adaptability or versatilityVSQuantity of substance

Solution Approach 1:

The memory control circuit is designed to perform multiple functions: it can actively access data from host memory while also managing command storage and execution. The first buffer region is specifically optimized for command storage, allowing the system to maintain active data access capabilities while providing dedicated space for continuous command execution.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Device complexity

If commands are stored in limited buffer space, then device complexity is reduced, but continuous execution of commands cannot be ensured

Engineering Contradiction:
Improvebuffer management complexityVSAvoidcontinuous command execution
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent implements a dynamic command queue mechanism that adapts to the execution state of commands. The queue can continuously accept new commands while previous commands are being executed, and it dynamically manages the flow of commands to ensure continuous execution without requiring complex buffer management, thus maintaining low device complexity while ensuring reliability.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS11928358B2Command management method, memory storage device and memory control circuit
Publication Date: 2024.03.12 PHISON ELECTRONICS
  • US11928358B2 patent drawing
  • US11928358B2 patent drawing
  • US11928358B2 patent drawing

AI summary

A command management method, a memory storage device, and a memory control circuit unit are disclosed. The method includes: obtaining a plurality of commands from a memory of a host system; storing the commands in a first buffer region of the memory storage device; in response to a first command and a second command meeting a pairing condition in the first buffer region, putting the first command and the second command in the first buffer region in a first command queue of the memory storage device; and continuously executing the first command and the second command in the first command queue.