Command and Strobe Synthesis for ODT Timing Control

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Solution Overview

Problem

In semiconductor devices, impedance mismatch between components leads to signal reflection, which is not effectively addressed by existing on-die termination circuits, particularly due to variations in process conditions affecting timing parameters like tADC.

Innovation Solution

The semiconductor device incorporates a command synthesis circuit, a strobe control signal synthesis circuit, and a drive control circuit, synchronized with multiple division clock signals to generate and shift commands and signals, enabling precise control for on-die termination operations and preventing signal mismatch.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If an impedance matching circuit (ODT circuit) is used to suppress signal reflection, then signal reflection is reduced, but timing parameter variation (tADC) occurs due to process condition variations

Engineering Contradiction:
Improvesignal reflection suppressionVSAvoidtiming parameter consistency
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent implements dynamic adjustment of the ODT circuit's resistance value based on detected timing parameter variations. The circuit transitions from a static impedance matching configuration to a dynamic one that adapts to process conditions, allowing the resistance to be modified in real-time to maintain both signal reflection suppression and timing consistency across different manufacturing variations

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent introduces a feedback mechanism that monitors the timing parameter tADC and adjusts the ODT circuit's resistance value accordingly. This closed-loop control system detects timing variations caused by process conditions and automatically compensates by modifying the termination resistance, thereby maintaining both signal integrity and timing precision despite manufacturing variations

Inventive Principle:
Principle #23Feedback

2Productivity

If the swing width of transmission signals is reduced to increase data rate, then productivity increases, but signal reflection increases due to impedance mismatch

Engineering Contradiction:
Improvedata transmission rateVSAvoidsignal reflection
Core Design Contradiction:
ProductivityVSObject-generated harmful factors

Solution Approach 1:

The patent dynamically changes the resistance value parameter of the ODT circuit to match the reduced signal swing width. By adjusting the termination resistance to be proportional to the signal swing, the circuit maintains effective impedance matching even at higher data rates with smaller voltage swings, thereby reducing reflection while preserving increased productivity

Inventive Principle:
Principle #35Parameter changes

3Ease of manufacture

If a simple ODT circuit is used to reduce device complexity, then ease of manufacture improves, but timing parameter control precision deteriorates

Engineering Contradiction:
Improvecircuit implementation simplicityVSAvoidtiming parameter control
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent divides the ODT circuit into multiple adjustable resistance elements that can be independently controlled. This segmentation allows the circuit to maintain a relatively simple overall structure while enabling precise timing parameter control through selective adjustment of individual resistance segments, thereby resolving the contradiction between simplicity and precision

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS10636462B2Semiconductor devices
Publication Date: 2020.04.28 SK HYNIX INC
  • US10636462B2 patent drawing
  • US10636462B2 patent drawing
  • US10636462B2 patent drawing

AI summary

A semiconductor device includes a command synthesis circuit synchronized with a first division clock signal to shift a command based on an offset signal and synchronized with a second division clock signal to generate a command synthesis signal from the shifted command. The semiconductor device also includes a strobe control signal synthesis circuit synchronized with the second division clock signal to generate a strobe synthesis signal from a strobe control signal. The semiconductor device further includes a drive control circuit generating a drive control signal from any one of the command synthesis signal and a drive signal based on the strobe synthesis signal.