Command Triggered Power Gating for Memory Devices
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Solution Overview
Problem
Memory devices face challenges in reducing power consumption, which affects battery life in battery-powered devices, as existing technologies lack efficient methods for independent activation and deactivation of components within the memory device.
Innovation Solution
Implementing command triggered power gating by using multiple local power domains (LPDs) that can be activated and deactivated independently, specifically for row logic circuitry and error correction code (ECC) circuitry, in response to specific commands, allowing for reduced power usage during standby or power-down states.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If memory devices use traditional power management, then components remain active to ensure quick access, but power consumption increases
Solution Approach 1:
The memory device is divided into multiple independent local power domains (LPDs), each capable of being activated or deactivated independently. This segmentation allows specific components (row logic circuitry, ECC circuitry, memory banks) to be powered down when not needed, reducing overall power consumption while maintaining quick access capability for active components.
Solution Approach 2:
The power state of different memory components is made dynamic rather than static. Components can transition between active and powered-down states based on operational needs, allowing the system to optimize between power consumption and access speed in real-time.
2Reliability
If memory devices activate all components for quick access, then access speed is maintained, but power consumption increases
Solution Approach 1:
The system performs preliminary actions by activating specific LPDs and components in advance of when they are needed for operation. This allows components to be in a ready state with lower power consumption compared to fully active, while still enabling quick activation when access is required.
Solution Approach 2:
Different parts of the memory device have different power states tailored to their specific needs. Active components receive full power for reliable operation, while inactive components are powered down to conserve energy, creating local quality variations in power delivery across the device.
3Use of energy by moving object
If memory devices use independent power domains, then power consumption is reduced, but device complexity increases
Solution Approach 1:
The power management system is designed with universal control mechanisms that can manage multiple LPDs and components through standardized interfaces and protocols. This multi-functionality allows a single control structure to handle the complexity of coordinating multiple power domains without requiring separate management systems for each component.
Data Source
AI summary
Methods, systems, and devices for command triggered power gating for a memory device are described. Row logic circuitry for a memory array may be powered up (on) or powered down (off) independent of at least some other components of a memory device. For example, the row logic circuitry may be on when a bank of the memory array is an active state but may be off when the bank is in a stand-by or power-down state. Additionally or alternatively, error correction circuitry for a memory array may be powered up (on) or powered down (off) independent of at least some other components of a memory device. For example, the error correction circuitry may be on during an access portion of an access sequence but may otherwise be off.