Commodity FPGA Logic Drive for Low-NRE Scalable Logic Expansion

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Solution Overview

Problem

The high costs and inefficiencies of transitioning from Field Programmable Gate Arrays (FPGA) to Application Specific IC (ASIC) or Customer-Owned Tooling (COT) chips, particularly due to larger chip size, lower yield, higher power consumption, and increased Non-Recurring Engineering (NRE) costs in advanced semiconductor technology nodes, hinder innovation and scalability.

Innovation Solution

Utilizing standardized commodity logic drives comprising plural FPGA IC chips and non-volatile memory IC chips, allowing for field programming and reducing NRE costs by enabling innovation and workload processing through software development, compatible with advanced technology nodes like 16 nm, 10 nm, 7 nm, 5 nm, or 3 nm, and facilitating a 'public innovation platform' for developers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If FPGA IC chips are used for field programming purposes, then adaptability and ease of operation are improved, but device complexity and manufacturing cost increase

Engineering Contradiction:

Improvefield programming capabilityVSAvoidchip structure

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent divides the logic drive into multiple standardized commodity FPGA IC chips, each performing specific logic functions. This segmentation allows the system to achieve complex field programming capabilities while keeping individual chip designs simpler and more manufacturable

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent uses standardized commodity FPGA IC chips that can be programmed to perform multiple different logic functions. This universality provides field programming adaptability without requiring custom-designed chips for each application, reducing device complexity

Inventive Principle:

Principle #6Universality (Multi-functionality)

2Productivity

If advanced semiconductor technology nodes (below 20 nm) are used, then productivity and performance are improved, but manufacturing cost and NRE cost increase

Engineering Contradiction:

Improveworkload processing capabilityVSAvoidNRE cost

Core Design Contradiction:

ProductivityVSEase of manufacture

Solution Approach 1:

The patent uses standardized commodity FPGA IC chips that are mass-produced copies with proven manufacturing processes. This approach captures the productivity benefits of advanced technology nodes while avoiding the high NRE costs of custom ASIC designs, as the FPGA chips are commercially available off-the-shelf components

Inventive Principle:

Principle #26Copying

Solution Approach 2:

The patent changes the manufacturing approach from custom ASIC fabrication (high NRE) to standardized FPGA production (low NRE). This parameter change in the manufacturing strategy allows access to advanced technology nodes without proportionally increasing costs

Inventive Principle:

Principle #35Parameter changes

3Adaptability or versatility

If FPGA IC chips are used instead of ASIC chips, then adaptability is improved, but power consumption increases

Engineering Contradiction:

Improveprogramming flexibilityVSAvoidpower consumption

Core Design Contradiction:

Adaptability or versatilityVSUse of energy by moving object

Solution Approach 1:

The patent uses FPGA chips that can dynamically reconfigure their logic functions through field programming. This dynamic adaptability allows the system to optimize power consumption for specific workloads by activating only the necessary logic functions, rather than having all functions permanently implemented as in ASICs

Inventive Principle:

Principle #15Dynamics

4Manufacturing precision

If custom ASIC or COT chips are designed, then manufacturing precision is improved, but ease of manufacture and NRE cost worsen

Engineering Contradiction:

Improvechip fabrication qualityVSAvoidproduction complexity

Core Design Contradiction:

Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The patent uses standardized commodity FPGA IC chips that are designed for mass production with optimized manufacturing processes. These standardized chips achieve high manufacturing precision through proven fabrication techniques while being easier and cheaper to manufacture than custom ASIC or COT chips

Inventive Principle:

Principle #27Cheap short-living objects (Disposable)

Data Source

PatentUS12476637B2Logic drive using standard commodity programmable logic IC chips

Publication Date: 2025.11.18 ICOMETRUE CO LTD

AI summary

An expandable logic scheme based on a chip package, includes: an interconnection substrate comprising a set of data buses for use in an expandable interconnection scheme, wherein the set of data buses is divided into a plurality of data bus subsets; and a first field-programmable-gate-array (FPGA) integrated-circuit (IC) chip comprising a plurality of first I/O ports coupling to the set of data buses and at least one first I/O-port selection pad configured to select a first port from the plurality of first I/O ports in a first clock cycle to pass a first data between a first data bus subset of the plurality of data bus subsets and the first field-programmable-gate-array (FPGA) integrated-circuit (IC) chip.