Common Board Circuit Layout for CPU and GPU HDMI Interfaces

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Solution Overview

Problem

The use of a common printed circuit board design for different computer models with HDMI connectors requires a multiplexer for signal port switching, leading to space inefficiencies and increased costs due to the need for signal multiplexing.

Innovation Solution

A circuit layout method and device that integrates design specifications for CPUs and GPUs with a signal conditioner to create a common board circuit layout, replacing the multiplexer and optimizing board space and cost by considering the layout specifications of both components and selecting a suitable signal conditioner.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If a multiplexer is used for signal port switching in a common PCB design, then different computer models can share the same HDMI connector, but the PCB space becomes insufficient and cost increases

Engineering Contradiction:
Improvecommon board compatibilityVSAvoidPCB available space
Core Design Contradiction:
Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

The patent segments the common board circuit into two independent parts: a design circuit that can be shared across different models, and a signal conditioner that is specifically selected and configured for each model's requirements. This segmentation eliminates the need for a multiplexer while maintaining model-specific performance characteristics.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent creates a universal design circuit that can serve multiple different computer models simultaneously without requiring a multiplexer. The design circuit is configured to handle high-speed signals for various models, making it multi-functional and eliminating the need for additional switching components.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Device complexity

If a multiplexer is used for signal port switching, then signal routing is simplified, but manufacturing cost increases

Engineering Contradiction:
Improvesignal routing complexityVSAvoidmanufacturing cost
Core Design Contradiction:
Device complexityVSEase of manufacture

Solution Approach 1:

By segmenting the circuit into a universal design circuit and model-specific signal conditioners, the patent eliminates the multiplexer component. This reduces the total component count and simplifies the manufacturing process, thereby reducing manufacturing costs while maintaining signal routing functionality.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent extracts and removes the multiplexer from the common board design. Instead of including the multiplexer as part of the standard configuration, the solution takes out this unnecessary component and replaces it with a simplified architecture using a shared design circuit and dedicated signal conditioners.

Inventive Principle:
Principle #2Taking out (Extraction)

3Reliability

If different layout design specifications are used for CPU and GPU, then each component's performance is optimized, but integrating them into a common board becomes complex

Engineering Contradiction:
Improvecomponent performanceVSAvoidlayout integration complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the layout design into separate evaluation processes for the design circuit and the signal conditioner. Each component is evaluated and configured according to its specific requirements, then integrated into a unified common board layout. This segmented approach simplifies the integration process while maintaining optimal performance for each component.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS20240281586A1Circuit layout method and device
Publication Date: 2024.08.22 ASUSTEK COMPUTER INC
  • US20240281586A1 patent drawing
  • US20240281586A1 patent drawing
  • US20240281586A1 patent drawing

AI summary

A circuit layout method and a circuit layout device. The method is adapted for a circuit layout of a common board circuit between a CPU, a GPU and a multimedia interface connector. The common board circuit includes a design circuit and a signal conditioner. The method includes the following steps: a common board evaluation is performed on multiple predetermined models according to a first layout design specification of the CPU and a second layout design specification of the GPU; the design circuit is planned according to a result of the common board evaluation; the suitable signal conditioner is selected according to the planned design circuit; and the first layout design specification, the second layout design specification and a third layout design specification of the signal conditioner are integrated, and accordingly a layout circuit diagram of the common board circuit is drawn.