Common Boosted Assist Circuit for Low Voltage Memory
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Solution Overview
Problem
Memory devices, such as SRAM and DRAM, face challenges in resolving low voltage states (approximately 0.4 volts) during read and write operations, leading to issues with determining whether a cell stores a '1' or '0', necessitating increased current to improve memory yield.
Innovation Solution
A common boosted assist circuit and method that uses a common boost logic device to add a boost voltage to both read and write logic circuits, preventing data propagation during read operations and enhancing performance at low voltages by integrating a NMOS transistor with sense amplifier bias transistors, allowing for improved read and write yields without additional boost fins.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If low voltage (approximately 0.4 volts) is used for memory operations, then power consumption is reduced, but the ability to resolve voltage states (determine '1' or '0') deteriorates
Solution Approach 1:
A common boost logic device is introduced as an intermediary component that generates a boost voltage to assist both read and write operations. This boost voltage acts as a mediator that enhances the voltage differential on bitlines during operations, enabling reliable state resolution even when operating at low supply voltages. The boost logic device receives control signals and generates the necessary voltage assistance without requiring separate boost circuits for read and write operations.
Solution Approach 2:
The common boost logic device is designed to serve multiple functions - it provides voltage boosting for both read operations and write operations using a single circuit implementation. This multi-functional approach eliminates the need for separate boost circuits, reducing overall circuit complexity while maintaining the ability to resolve voltage states during both read and write operations at low supply voltages.
2Measurement precision
If separate boost circuits are used for read and write operations, then voltage state resolution is improved, but device complexity increases
Solution Approach 1:
The boost logic circuits for read operations and write operations are merged into a single common boost logic device. This device shares common components including transistors, control logic, and voltage generation circuitry between the previously separate read and write boost circuits. The merging maintains the functional capability to boost voltages for both operation types while reducing the total number of components and simplifying the overall circuit architecture.
Solution Approach 2:
The common boost logic device is designed with universal functionality to handle both read and write operation requirements. By implementing a single circuit that can be controlled to serve both purposes, the design eliminates redundancy while maintaining the necessary voltage state resolution capability for different operation types.
3Reliability
If additional boost fins are added to improve read and write yields, then memory yield is improved, but manufacturing complexity and area increase
Solution Approach 1:
Instead of modifying the physical structure by adding boost fins, the solution changes the electrical parameters by introducing a boost voltage through the common boost logic device. This voltage parameter modification enhances the electrical characteristics during read and write operations, improving memory yield without requiring additional physical structures or changing the geometric parameters of the memory cells.
Data Source
AI summary
The present disclosure relates to a structure which includes an assist circuit which is configured to add a boost voltage using a common boost logic device for both a read logic circuit and a write logic circuit of the assist circuit.