Common Gate Structure for Germanium Photodetector CMOS Integration
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Solution Overview
Problem
The integration of germanium into conventional CMOS processing is complicated by thermal budget issues, cross-contamination, doping issues, and non-ohmic contact formation, making it challenging to fabricate waveguides and germanium photodetectors compatible with CMOS processing.
Innovation Solution
A semiconductor chip with a photonics device and CMOS device sharing a common gate structure, where a germanium gate is coplanar with a metal or polysilicon gate, and nitride encapsulation is used to overcome integration challenges, allowing for effective fabrication of waveguides and photodetectors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If germanium is integrated into conventional CMOS processing, then optical interconnects can be formed, but thermal budget issues and cross-contamination occur
Solution Approach 1:
The substrate is divided into distinct first and second regions with different thermal budgets. The first region accommodates germanium-based photodetectors requiring higher thermal budget, while the second region contains standard CMOS circuits operating at lower temperatures. This spatial segmentation allows each region to be optimized for its specific thermal requirements without interfering with the other, thereby resolving the thermal budget conflict while achieving versatile integration.
2Ease of manufacture
If germanium photodetectors are fabricated with conventional CMOS processes, then manufacturing simplicity is maintained, but non-ohmic contact formation occurs
Solution Approach 1:
Different contact structures are implemented in different regions of the device. In the germanium photodetector region, first contacts are specifically designed to mate with germanium, providing optimal ohmic contact. In the CMOS region, conventional metal contacts are used. This local differentiation of contact quality ensures reliable electrical connections in each region while maintaining overall manufacturing simplicity through a unified process flow.
3Manufacturing precision
If separate processing lines are used for germanium and CMOS devices, then fabrication quality is maintained, but device complexity and manufacturing cost increase
Solution Approach 1:
The patent merges the germanium photodetector fabrication process with the standard CMOS processing line by implementing a unified multi-region substrate approach. Both device types are fabricated simultaneously in the same processing line using region-specific process parameters, eliminating the need for separate processing lines. This integration maintains fabrication quality through localized process optimization while reducing overall device complexity and manufacturing cost.
Data Source
AI summary
A semiconductor chip having a photonics device and a CMOS device which includes a photonics device portion and a CMOS device portion on a semiconductor chip; a metal or polysilicon gate on the CMOS device portion, the metal or polysilicon gate having a gate extension that extends toward the photonics device portion; a germanium gate on the photonics device portion such that the germanium gate is coplanar with the metal or polysilicon gate, the germanium gate having a gate extension that extends toward the CMOS device portion, the germanium gate extension and metal or polysilicon gate extension joined together to form a common gate; spacers formed on the germanium gate and the metal or polysilicon gate; and nitride encapsulation formed on the germanium gate.