Common Gate LNA with Stacked Inductor for Area Reduction
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Solution Overview
Problem
Existing antenna diversity integrated circuits face challenges in minimizing integrated circuit area, power consumption, and switching speed due to the need for large inductors and slow switching mechanisms, especially in ultra-low power sensor networks where cost and silicon area are critical.
Innovation Solution
The implementation of a low noise amplifier circuit with a common-gate topology and a stacked inductor that acts as a load and compensates parasitic capacitance, allowing for efficient switching and minimizing integrated circuit footprint, along with a constant-gm biasing circuit for robust operation and fast switching speeds.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a common source stage with inductors is used for input matching, then proper matching is achieved, but integrated circuit area increases
Solution Approach 1:
The patent removes the inductor component from the input matching network by extracting the matching function and implementing it through the common-gate transistor configuration and gate biasing, thereby eliminating the area occupied by physical inductors while maintaining proper input matching
Solution Approach 2:
The patent replaces the traditional inductor-based matching network with an active transistor-based common-gate configuration, substituting passive mechanical components with active electronic circuitry that achieves the same matching function without requiring large on-chip inductors
2Ease of operation
If LNA stages are selected by removing gate bias, then switching is achieved, but switching speed becomes slow
Solution Approach 1:
The patent applies preliminary action by pre-charging the gate capacitances through dedicated charge pump circuits that are always active, so that when switching is required, the charge transfer can occur rapidly without the delay of charging large capacitances from scratch, thereby achieving fast switching while maintaining proper LNA selection
Solution Approach 2:
The patent implements periodic action through the clocked operation of the charge pump circuits that periodically transfer charge to the gate nodes, enabling rapid switching between LNA stages by synchronizing the charge transfer with the desired switching timing, thus achieving both proper selection and fast switching speeds
3Reliability
If multiple LNA stages are continuously biased, then isolation between antennas is improved, but power consumption increases
Solution Approach 1:
The patent applies dynamics by making the biasing configuration adaptive - the common-gate transistors are continuously biased to maintain isolation, but the actual LNA stages are dynamically switched on and off based on selection, optimizing the balance between isolation performance and power consumption by only powering the necessary components
Solution Approach 2:
The patent implements local quality by applying different biasing strategies to different parts of the circuit - the common-gate isolation transistors are continuously biased to maintain antenna isolation, while the main LNA stages are selectively biased only when needed, thereby achieving good isolation without unnecessarily powering all LNA stages at all times
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution achieves improved antenna diversity performance with reduced insertion loss, minimal area and power consumption, and fast switching speeds, enhancing link budget and reliability against interferers in wireless applications.
Implementation Method 1
The outputs of the first stages are combined in a summing node to which an inductor and an input connection of the second stage are connected. The inductor acts as a load for selected antenna input and as a compensation of parasitic capacitance at each output of non-selected first stages.
Implementation Method 2
The inductor acts as a load for selected antenna input and as a compensation of parasitic capacitance at each output of non-selected first stages.
Data Source
AI summary
Antenna diversity integrated circuit having two or more RF input connections for connecting an antenna (1a, 1b, 1c). A low noise amplifier circuit is present having a first stage (7a, 7b, 7c) for each one of the two or more RF input connections and a single second stage (8). Output connections of each of the first stages (7a, 7b, 7c) are combined in a single summing node to which an inductor (L) and an input connection of the second stage (8) are connected. During operation one of the two or more first stages (7a, 7b, 7c) is activated to provide an input signal to the second stage (8).