Common-Gate Amplifier With Regulated Cascode for Higher SFDR

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Solution Overview

Problem

Radar receivers face challenges in achieving high spurious free dynamic range (SFDR) due to limitations in the amplification process, specifically in providing both high gain-bandwidth and sufficient DC-gain over a wide output range.

Innovation Solution

A common-gate amplifier arrangement is proposed, incorporating a common-gate amplifier and an inner regulated cascode to enhance DC-gain and gain-bandwidth, utilizing a current source with high output impedance for improved intermodulation products.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a conventional amplifier is used in a radar receiver, then the circuit is simple, but the spurious free dynamic range (SFDR) is limited due to insufficient DC-gain and gain-bandwidth

Engineering Contradiction:
ImproveSFDR performanceVSAvoidamplifier structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The amplifier is divided into two functional segments: a common-gate amplifier stage for providing high gain-bandwidth and a regulated cascode stage for boosting DC-gain. This segmentation allows each stage to optimize for its specific function, resolving the contradiction between SFDR performance and structural complexity by distributing the performance requirements across specialized sub-stages rather than requiring a single complex amplifier design.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The regulated cascode stage is nested within the common-gate amplifier structure, with the cascode transistor integrated into the signal path of the common-gate stage. This nesting allows the DC-gain boosting function to be embedded within the existing high gain-bandwidth structure, improving SFDR performance without adding significant external complexity to the overall amplifier architecture.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Speed

If the amplifier provides high gain-bandwidth, then the response speed is fast, but the DC-gain becomes insufficient for wide output range operation

Engineering Contradiction:
Improvegain-bandwidthVSAvoidDC-gain
Core Design Contradiction:
SpeedVSPower

Solution Approach 1:

The amplifier's gain characteristics are segmented into two distinct functional areas: the common-gate stage handles the gain-bandwidth requirement for fast response, while the regulated cascode stage handles the DC-gain requirement for wide output range. This segmentation resolves the contradiction by assigning different gain characteristics to different stages rather than requiring a single stage to optimize both conflicting parameters simultaneously.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The regulated cascode stage acts as an intermediary between the common-gate amplifier and the load, boosting the DC-gain of the signal without significantly affecting the high gain-bandwidth characteristic already established by the common-gate stage. This intermediary stage resolves the contradiction by adding DC-gain enhancement while preserving the fast response capability of the original amplifier.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If the output impedance is increased to improve intermodulation products, then the SFDR performance improves, but the circuit complexity increases

Engineering Contradiction:
Improveintermodulation productsVSAvoidcircuit structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The high output impedance characteristic is achieved by nesting the regulated cascode transistor within the amplifier structure, where it naturally provides high output impedance as part of its voltage amplification function. This nested configuration improves intermodulation products and SFDR performance without requiring additional external impedance-matching components or complex circuit topologies.

Inventive Principle:
Principle #7Nested doll (Nesting)

Data Source

PatentUS20250233563A1Common-gate amplifying arrangement
Publication Date: 2025.07.17 INFINEON TECHNOLOGIES AG
  • US20250233563A1 patent drawing
  • US20250233563A1 patent drawing
  • US20250233563A1 patent drawing

AI summary

A common-gate amplifying arrangement. The common-gate amplifying arrangement includes a common-gate amplifier and an inner regulated cascode. The inner regulated cascode amplifies a signal provided by the common-gate amplifier, which is responsive to an input signal.