Common Memory Die for Variable Bandwidth Interfaces
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Solution Overview
Problem
Current memory devices require separate designs and increased production costs due to the need for different implementations with varying data bus bandwidths, limiting their versatility and efficiency in both power management and capacity across different applications.
Innovation Solution
A memory device that supports both full-bandwidth and narrower bandwidth implementations by dynamically adjusting data transfer through burst length manipulation, allowing a common memory die to interface with different system data buses, thereby increasing system capacity and reducing production costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If separate memory device designs are used for different data bus bandwidth implementations, then adaptability to different applications is improved, but device complexity and production costs increase
Solution Approach 1:
The memory device is designed with a common die that can operate in multiple bandwidth modes (e.g., x32, x16, x8) by dynamically adjusting the data bus interface width. This universal design allows a single device to replace multiple specialized devices, reducing complexity while maintaining adaptability across different application requirements
2Use of energy by moving object
If wider data bus interfaces are used in low power memory devices, then power efficiency is improved, but memory capacity per channel decreases
Solution Approach 1:
The memory device dynamically adjusts its data bus interface width based on system requirements. The device can switch between wider interfaces (x32) for power-efficient operations and narrower interfaces (x16, x8) for higher capacity requirements, allowing flexible optimization of both power efficiency and memory capacity per channel without being constrained to a fixed interface width
3Quantity of substance
If narrower data bus interfaces are used to increase memory capacity per channel, then memory capacity is improved, but power consumption increases
Solution Approach 1:
The memory device dynamically adjusts its data bus interface width based on system requirements. The device can switch between wider interfaces (x32) for power-efficient operations and narrower interfaces (x16, x8) for higher capacity requirements, allowing flexible optimization of both power efficiency and memory capacity per channel without being constrained to a fixed interface width
4Adaptability or versatility
If multiple different memory die are produced for varying implementations, then adaptability to different applications is improved, but manufacturing costs and production efficiency worsen
Solution Approach 1:
The memory device is designed with a common die that can operate in multiple bandwidth modes (e.g., x32, x16, x8) by dynamically adjusting the data bus interface width. This universal design allows a single device to replace multiple specialized devices, reducing complexity while maintaining adaptability across different application requirements
Data Source
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AI summary
A memory device and a memory controller can interface over a system data bus that has a narrower bandwidth than a data bus internal to the memory device. The memory device and memory controller transfer data over the system data bus on all transfer periods of a burst length, but send fewer bits than would be needed for the exchange to transfer all bits that can be read or written on the internal data bus of the memory device. The memory device can have different operating modes to allow for a common memory device to be used in different system configurations based on the ability to interface with the narrower bandwidth system data bus.