Common Memory Interface Adapter for Parallel Access Bottlenecks
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Solution Overview
Problem
The number of memory access attempts increases exponentially when shared data are distributed across multiple computers, leading to increased network load and bottlenecks, especially when shared data are concentrated in a single computer, hindering parallel processing and causing unnecessary power consumption.
Innovation Solution
An apparatus and method for interfacing with common memory that includes a computer I/O interface protocol processing unit, a direct memory access unit, and a common memory interface unit, allowing computers to access a shared memory space directly through memory adapters, reducing the need for network interface cards and sequential memory access, thereby linearizing memory access attempts and preventing bottlenecks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If shared data are distributed across the memory of respective computers, then data accessibility is improved, but the number of memory access attempts increases exponentially
Solution Approach 1:
The patent merges the memory resources of multiple computers into a unified shared memory space. Instead of distributing data across separate computer memories, all computers access a single common memory through memory adapters connected via a high-speed interconnect. This consolidation reduces the exponential growth of access attempts by providing a centralized memory resource that all computers can access efficiently.
Solution Approach 2:
The patent introduces memory adapters as intermediary devices between computers and the shared memory. These adapters handle memory access requests, translate addresses, and manage data transfer between computers and the common memory space, eliminating the need for direct network communication for memory access and reducing protocol overhead.
2Device complexity
If shared data are concentrated in a single computer, then memory management is simplified, but network load increases and bottlenecks are formed
Solution Approach 1:
The patent segments the memory access function from the computer system by introducing dedicated memory adapters. Each computer has its own memory adapter that handles memory access independently, allowing parallel processing of memory requests. This segmentation prevents the formation of bottlenecks at any single computer while maintaining simplified memory management through the unified memory space.
Solution Approach 2:
The patent replaces the traditional network-based data access mechanism with a direct memory access mechanism. Instead of using network interface cards and protocol stacks for memory access, computers use memory adapters connected through a high-speed interconnect that provides direct access to the shared memory space, eliminating network protocol overhead and reducing energy consumption.
3Adaptability or versatility
If network interface cards are used for memory access between computers, then data sharing is enabled, but protocol processing overhead increases power consumption
Solution Approach 1:
The patent extracts the memory access function from the network interface card and creates a separate memory adapter component. This dedicated adapter handles only memory access operations, eliminating the need for complex network protocol processing and reducing power consumption while maintaining data sharing capabilities through the shared memory space.
Data Source
AI summary
Disclosed herein are an apparatus and method for interfacing with common memory. The apparatus for interfacing with common memory includes a computer-input/output (I/O)-interface-protocol-processing unit for receiving a packet for accessing common memory from a computer; a direct memory access unit for transforming the packet into an instruction for performing any one of reading from and writing to the common memory; and a common memory interface unit for transmitting the instruction to the common memory and receiving information about whether execution of the instruction is completed from the common memory.