Common-Mode Current-to-Voltage Converter for Neural Memory Arrays
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Solution Overview
Problem
Existing hardware technologies for artificial neural networks lack adequate energy efficiency and are bulky due to the high number of synapses required for high computational parallelism, especially when compared to biological networks.
Innovation Solution
Utilization of non-volatile memory arrays as synapses in neural networks, allowing for individual programming, erasing, and reading of memory cells without affecting others, and enabling continuous analog programming for precise weight tuning, thereby eliminating the need for separate multiplication and addition logic circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If digital supercomputers or specialized graphics processing unit clusters are used to achieve high computational parallelism, then computational capability is improved, but energy efficiency deteriorates and cost increases
Solution Approach 1:
The patent merges the functions of synapse weights storage and computation into a single crossbar array structure. The conductance values of memory cells directly represent synapse weights, eliminating the need for separate storage and processing units. This integration enables massive parallel matrix-vector multiplication operations while consuming minimal energy, as the computation occurs naturally through Ohm's law and Kirchhoff's current law during read operations.
Solution Approach 2:
The patent replaces traditional digital mechanical/computational systems with an analog electrical system. Instead of using digital circuits to perform multiplication and addition operations, the system uses the physical properties of electrical circuits (Ohm's law, Kirchhoff's current law) to naturally compute the results. The conductance of memory cells represents weights, and currents flowing through them automatically perform the mathematical operations, substituting complex digital logic with simple physical laws.
2Use of energy by moving object
If CMOS analog circuits are used for artificial neural networks, then energy efficiency is improved, but device area increases due to bulky synapse implementations
Solution Approach 1:
The patent makes the memory array serve multiple functions simultaneously. The same crossbar array that stores data is also used for computation. Memory cells store synapse weights as conductance values, and during read operations, they automatically perform multiplication and addition functions through electrical circuit laws. This multi-functionality eliminates the need for separate analog circuitry for each synapse, dramatically reducing the device area required while maintaining energy efficiency.
3Device complexity
If non-volatile memory arrays are used as synapses, then circuit complexity is reduced by eliminating separate multiplication and addition logic circuits, but precision and control over individual memory cells must be maintained
Solution Approach 1:
The patent changes the physical parameter used to represent synapse weights from digital voltage levels to analog conductance values. By programming the conductance of each memory cell to a specific value, the system achieves precise weight representation. The conductance can be continuously adjusted through programming operations, enabling fine-grained control over synapse weights while maintaining simplicity in the overall circuit architecture.
Data Source
AI summary
In one example, a system comprises a current-to-voltage converter to generate differential voltages from differential currents comprising a first current and a second current, the current-to-voltage converter comprising: a first bitline to provide the first current; a second bitline to provide the second current; a first regulator to apply a first voltage to the first bitline; a second regulator to apply a second voltage to the second bitline; a regulating circuit comprising a first input terminal, a second input terminal, a first output terminal, and a second output terminal, the first output terminal and the second output terminal providing the differential voltages; and a common mode circuit.